History and Background: Digital Logic and Fault Simulation

The future of labor market depends upon several factors, long-term innovation and the demographic developments. However, one of the main drivers of technological change in the future is digitalization and central to this development is the production and use of digital logic circuits and its derived technologies, including the computer,the smart phone and the Internet. Especially, smart automation will perhaps not cause e.g.regarding industries, occupations, skills, tasks and duties

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A Manual Diagnosis Approach Using Targeted Fault Injection and Fault Simulation to Extend ATPG Diagnostic Resolution in Localizing Faults

ISTFA 2019: Conference Proceedings from the 45th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2019p0419 ◽

2019 ◽

Author(s):

Rommel Estores ◽

Karo Vander Gucht

Keyword(s):

Fault Injection ◽

Fault Simulation ◽

Fault Localization ◽

Pattern Generation ◽

Test Coverage ◽

Actual Case ◽

Electrical Failure ◽

Starting Point ◽

Diagnostic Resolution ◽

Diagnosis Approach

Abstract This paper discusses a creative manual diagnosis approach, a complementary technique that provides the possibility to extend Automatic Test Pattern Generation (ATPG) beyond its own limits. The authors will discuss this approach in detail using an actual case – a test coverage issue where user-generated ATPG patterns and the resulting ATPG diagnosis isolated the fault to a small part of the digital core. However, traditional fault localization techniques was unable to isolate the fault further. Using the defect candidates from ATPG diagnosis as a starting point, manual diagnosis through fault Injection and fault simulation was performed. Further fault localization was performed using the ‘not detected’ (ND) and/or ‘detected’ (DT) fault classes for each of the available patterns. The result has successfully deduced the defect candidates until the exact faulty net causing the electrical failure was identified. The ability of the FA lab to maximize the use of ATPG in combination with other tools/techniques to investigate failures in detail; is crucial in the fast root cause determination and, in case of a test coverage, aid in having effective test screen method implemented.

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Combine Micro-Probing and OBIRCH to Catch Non-Recognizable Fault in RF and Mixed-Mode Integrated Circuits

ISTFA 2007: Conference Proceedings from the 33rd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2007p0327 ◽

2007 ◽

Author(s):

Cha-Ming Shen ◽

Yen-Long Chang ◽

Lian-Fon Wen ◽

Tan-Chen Chuang ◽

Shi-Chen Lin ◽

...

Keyword(s):

Integrated Circuits ◽

Radio Frequency ◽

Failure Analysis ◽

Case Studies ◽

Mixed Mode ◽

Failure Mechanisms ◽

Deep Submicron ◽

Digital Logic ◽

Successful Approach ◽

Cmos Processes

Abstract Highly-integrated radio frequency and mixed-mode devices that are manufactured in deep-submicron or more advanced CMOS processes are becoming more complex to analyze. The increased complexity presents us with many eccentric failure mechanisms that are uniquely different from traditional failure mechanisms found during failure analysis on digital logic applications. This paper presents a novel methodology to overcome the difficulties and discusses two case studies which demonstrate the application of the methodology. Through the case studies, the methodology was proven to be a successful approach. It is also proved how this methodology would work for such non-recognizable failures.

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Diagnostic Fault Simulation for the Failure Analyst

ISTFA 2004: Conference Proceedings from the 30th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2004p0181 ◽

2004 ◽

Author(s):

Dan Bodoh ◽

Anthony Blakely ◽

Terry Garyet

Keyword(s):

Fault Diagnosis ◽

Failure Analysis ◽

Complete Solution ◽

Fault Simulation ◽

Building Blocks ◽

Physical World ◽

Design For Test ◽

Fault Diagnosis System ◽

Diagnosis Algorithm ◽

Diagnosis Tool

Abstract Since failure analysis (FA) tools originated in the design-for-test (DFT) realm, most have abstractions that reflect a designer's viewpoint. These abstractions prevent easy application of diagnosis results in the physical world of the FA lab. This article presents a fault diagnosis system, DFS/FA, which bridges the DFT and FA worlds. First, it describes the motivation for building DFS/FA and how it is an improvement over off-the-shelf tools and explains the DFS/FA building blocks on which the diagnosis tool depends. The article then discusses the diagnosis algorithm in detail and provides an overview of some of the supporting tools that make DFS/FA a complete solution for FA. It also presents a FA example where DFS/FA has been applied. The example demonstrates how the consideration of physical proximity improves the accuracy without sacrificing precision.

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