Simulation Fault Injection Experimental Results

2014 ◽  
pp. 63-68
Author(s):  
José Rodrigo Azambuja ◽  
Fernanda Kastensmidt ◽  
Jürgen Becker
Keyword(s):  
Fault Injection ◽  
Experimental Results

Verification of Fault Control Measures Based on Fault Injection for MCU Control System

2014 ◽  
Vol 484-485 ◽  
pp. 325-331
Author(s):  
Dao Sen Niu ◽  
Xiao Dong Liu ◽  
Shou Qun Sun ◽  
Yang Liu
Keyword(s):  
Control System ◽  
Fault Diagnosis ◽  
Fault Injection ◽  
Short Circuit ◽  
Experimental Results ◽  
Control Measures ◽  
Level Variation ◽  
Software Fault ◽  
Hardware Faults ◽  
Software Measures

To verify the validity of fault control measures, a verification platform with software fault injection and hardware fault injection is developed to conduct fault diagnosis measures for MCU control system. For the faults occurring in the internal units of a controller, program debugger is employed to simulate software or hardware faults by varying the data; for the faults occurring in peripheral circuits, a circuit of fault-settings is employed to simulate hardware faults, i.e., open-/short-circuit and electrical level variation. This verification platform is applied to evaluate software measures to control the faults/errors in accordance with IEC60335/IEC60730/UL1998/CSA22.2.08, and a case of induction cooker is presented shows how it works. Experimental results show that the verification platform runs stably and accurately, and has a big value in practice.

scholarly journals A Cryptography Core Tolerant to DFA Fault Attacks

2007 ◽  
Vol 2 (1) ◽  
pp. 14-21
Author(s):  
Carlos R. Moratelli ◽  
Érika Cota ◽  
Marcelo S. Lubaszewski
Keyword(s):  
Fault Detection ◽  
Error Correction ◽  
Fault Injection ◽  
Smart Cards ◽  
Experimental Results ◽  
Transient Faults ◽  
Fault Attacks ◽  
Cryptographic Algorithms

This work describes a hardware approach for the concurrent fault detection and error correction in a cryptographic core. It has been shown in the literature that transient faults injected in a cryptographic core can lead to the revelation of the encryption key using quite inexpensive equipments. This kind of attack is a real threat to tamper resistant devices like Smart Cards. To tackle such attacks, the cryptographic core must be immune to transient faults. In this work the DES algorithm is taken as a vulnerable cryptosystem case study.We show how an attack against DES is performed through a fault injection campaign. Then, a countermeasure based on partial hardware replication is proposed and applied to DES. Experimental results show the efficiency of the proposed scheme to protect DES against DFA fault attacks. Furthermore, the proposed solution is independent of implementation, and can be applied to other cryptographic algorithms, such as AES.

scholarly journals Error control scheme for malicious and natural faults in cryptographic modules

2020 ◽  
Vol 10 (4) ◽  
pp. 321-336
Author(s):  
Mael Gay ◽  
Batya Karp ◽  
Osnat Keren ◽  
Ilia Polian
Keyword(s):  
Error Control ◽  
Fault Injection ◽  
Experimental Results ◽  
System Level ◽  
Electronic Systems ◽  
Minimal Distance ◽  
Outer Code ◽  
Injection Attacks ◽  
Control Scheme ◽  
Fault Injection Attacks

Abstract Today’s electronic systems must simultaneously fulfill strict requirements on security and reliability. In particular, their cryptographic modules are exposed to faults, which can be due to natural failures (e.g., radiation or electromagnetic noise) or malicious fault-injection attacks. We present an architecture based on a new class of error-detecting codes that combine robustness properties with a minimal distance. The new architecture guarantees (with some probability) the detection of faults injected by an intelligent and strategic adversary who can precisely control the disturbance. At the same time it supports automatic correction of low-multiplicity faults. To this end, we discuss an efficient technique to correct single nibble/byte errors while avoiding full syndrome analysis. We also examine a Compact Protection Code (CPC)-based system level fault manager that considers this code an inner code (and the CPC as its outer code). We report experimental results obtained by physical fault injection on the SAKURA-G FPGA board. The experimental results reconfirm the assumption that faults may cause an arbitrary number of bit flips. They indicate that a combined inner–outer coding scheme can significantly reduce the number of fault events that go undetected due to erroneous corrections of the inner code.

scholarly journals ACIMS: Analog CIM Simulator for DNN Resilience

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 686
Author(s):  
Dong Ding ◽  
Lei Wang ◽  
Zhijie Yang ◽  
Kai Hu ◽  
Hongjun He
Keyword(s):  
Energy Efficient ◽  
Fault Injection ◽  
Experimental Results ◽  
Hardware Accelerators ◽  
The Real ◽  
Analog Computing ◽  
Real Hardware ◽  
Computationally Intensive ◽  
Hardware Faults

Analog Computing In Memory (ACIM) combines the advantages of both Compute In Memory (CIM) and analog computing, making it suitable for the design of energy-efficient hardware accelerators for computationally intensive DNN applications. However, their use will introduce hardware faults that decrease the accuracy of DNN. In this work, we take Sandwich-Ram as the real hardware example of ACIM and are the first to propose a fault injection and fault-aware training framework for it, named Analog Computing In Memory Simulator (ACIMS). Using this framework, we can simulate and repair the hardware faults of ACIM. The experimental results show that ACIMS can recover 91.0%, 93.7% and 89.8% of the DNN’s accuracy drop through retraining on the MNIST, SVHN and Cifar-10 datasets, respectively; moreover, their adjusted accuracy can reach 97.0%, 95.3% and 92.4%.

scholarly journals Persistent Fault Analysis on Block Ciphers

2018 ◽  
pp. 150-172 ◽  
Author(s):  
Fan Zhang ◽  
Xiaoxuan Lou ◽  
Xinjie Zhao ◽  
Shivam Bhasin ◽  
Wei He ◽  
...  
Keyword(s):  
Time Synchronization ◽  
Fault Injection ◽  
Block Ciphers ◽  
Fault Analysis ◽  
Experimental Results ◽  
Fault Attacks ◽  
Intrinsic Nature ◽  
Fault Attack ◽  
Modular Redundancy

Persistence is an intrinsic nature for many errors yet has not been caught enough attractions for years. In this paper, the feature of persistence is applied to fault attacks, and the persistent fault attack is proposed. Different from traditional fault attacks, adversaries can prepare the fault injection stage before the encryption stage, which relaxes the constraint of the tight-coupled time synchronization. The persistent fault analysis (PFA) is elaborated on different implementations of AES-128, specially fault hardened implementations based on Dual Modular Redundancy (DMR). Our experimental results show that PFA is quite simple and efficient in breaking these typical implementations. To show the feasibility and practicability of our attack, a case study is illustrated on the shared library Libgcrypt with rowhammer technique. Approximately 8200 ciphertexts are enough to extract the master key of AES-128 when PFA is applied to Libgcrypt1.6.3 with redundant encryption based DMR. This work puts forward a new direction of fault attacks and can be extended to attack other implementations under more interesting scenarios.

Diagnostics of Gold Laser Plasmas

1988 ◽  
Vol 102 ◽  
pp. 357-360
Author(s):  
J.C. Gauthier ◽  
J.P. Geindre ◽  
P. Monier ◽  
C. Chenais-Popovics ◽  
N. Tragin ◽  
...  
Keyword(s):  
Experimental Results ◽  
Pure Gold ◽  
Electronic Temperature ◽  
X Ray ◽  
Laser Plasmas ◽  
Collisional Radiative Model ◽  
Radiative Model

AbstractIn order to achieve a nickel-like X ray laser scheme we need a tool to determine the parameters which characterise the high-Z plasma. The aim of this work is to study gold laser plasmas and to compare experimental results to a collisional-radiative model which describes nickel-like ions. The electronic temperature and density are measured by the emission of an aluminium tracer. They are compared to the predictions of the nickel-like model for pure gold. The results show that the density and temperature can be estimated in a pure gold plasma.

Observation of Phase Contrast Images in STEM and CTEM Modes by Using 100 kV Field Emission Electron Gun

1974 ◽  
Vol 32 ◽  
pp. 390-391
Author(s):  
Y. Harada ◽  
T. Goto ◽  
H. Koike ◽  
T. Someya
Keyword(s):  
Field Emission ◽  
Phase Contrast ◽  
Image Formation ◽  
Fresnel Diffraction ◽  
Experimental Results ◽  
Electron Gun ◽  
Scanning Microscopy ◽  
Emission Electron ◽  
Lattice Images

Since phase contrasts of STEM images, that is, Fresnel diffraction fringes or lattice images, manifest themselves in field emission scanning microscopy, the mechanism for image formation in the STEM mode has been investigated and compared with that in CTEM mode, resulting in the theory of reciprocity. It reveals that contrast in STEM images exhibits the same properties as contrast in CTEM images. However, it appears that the validity of the reciprocity theory, especially on the details of phase contrast, has not yet been fully proven by the experiments. In this work, we shall investigate the phase contrast images obtained in both the STEM and CTEM modes of a field emission microscope (100kV), and evaluate the validity of the reciprocity theory by comparing the experimental results.

Sign in / Sign up

Export Citation Format

Share Document