Floating-Gate 1Tr-NOR eFlash Memory

2017 ◽  
pp. 75-129
Author(s):  
Antonino Conte ◽  
Fabio Disegni ◽  
Francesco La Rosa ◽  
Alfonso Maurelli
Keyword(s):  
Floating Gate

Carrier Profiling of the 10-nm-order Structure in a 3D Flash Memory Cell Using Scanning Nonlinear Dielectric Microscopy

2019 ◽  
Author(s):  
Jun Hirota ◽  
Ken Hoshino ◽  
Tsukasa Nakai ◽  
Kohei Yamasue ◽  
Yasuo Cho
Keyword(s):  
Spatial Resolution ◽  
Flash Memory ◽  
Analytical Techniques ◽  
Memory Cell ◽  
Memory Device ◽  
Floating Gate ◽  
Order Structure ◽  
Carrier Distribution ◽  
Nonlinear Dielectric ◽  
Flash Memory Cell

Abstract In this paper, the authors report their successful attempt to acquire the scanning nonlinear dielectric microscopy (SNDM) signals around the floating gate and channel structures of the 3D Flash memory device, utilizing the custom-built SNDM tool with a super-sharp diamond tip. The report includes details of the SNDM measurement and process involved in sample preparation. With the super-sharp diamond tips with radius of less than 5 nm to achieve the supreme spatial resolution, the authors successfully obtained the SNDM signals of floating gate in high contrast to the background in the selected areas. They deduced the minimum spatial resolution and seized a clear evidence that the diffusion length differences of the n-type impurity among the channels are less than 21 nm. Thus, they concluded that SNDM is one of the most powerful analytical techniques to evaluate the carrier distribution in the superfine three dimensionally structured memory devices.

Investigations of Leakage Paths in Sub-0.35μm DRAM Products Using Advanced Focused Ion Beam Techniques

1998 ◽  
Author(s):  
H. Lorenz ◽  
C. Engel
Keyword(s):  
Focused Ion Beam ◽  
Cell Function ◽  
Dielectric Breakdown ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Floating Gate ◽  
Leakage Path ◽  
Contrast Technique ◽  
Voltage Contrast

Abstract Due to the continuously decreasing cell size of DRAMs and concomitantly diminishing thickness of some insulating layers new failure mechanisms appear which until now had no significance for the cell function. For example high resistance leakage paths between closely spaced conductors can lead to retention problems. These are hard to detect by electrical characterization in a memory tester because the involved currents are in the range of pA. To analyze these failures we exploit the very sensitive passive voltage contrast of the Focused Ion Beam Microscope (FIB). The voltage contrast can further be enhanced by in-situ FIB preparations to obtain detailed information about the failure mechanism. The first part of this paper describes a method to detect a leakage path between a borderless contact on n-diffusion and an adjacent floating gate by passive voltage contrast achieved after FIB circuit modification. In the second part we will demonstrate the localization of a DRAM trench dielectric breakdown. In this case the FIB passive voltage contrast technique is not limited to the localization of the failing trench. We can also obtain the depth of the leakage path by selective insitu etching with XeF2 stopped immediately after a voltage contrast change.

Floating Gate Memory Based on Ferritin Nanodots with High-kGate Dielectrics

2009 ◽  
Vol 48 (4) ◽  
pp. 04C153 ◽  
Author(s):  
Kosuke Ohara ◽  
Yukiharu Uraoka ◽  
Takashi Fuyuki ◽  
Ichiro Yamashita ◽  
Toshitake Yaegashi ◽  
...  
Keyword(s):  
Floating Gate ◽  
Floating Gate Memory

scholarly journals Single-Poly Floating-Gate Memory Cell Options for Analog Neural Networks

2021 ◽  
pp. 108062
Author(s):  
Maksym Paliy ◽  
Tommaso Rizzo ◽  
Piero Ruiu ◽  
Sebastiano Strangio ◽  
Giuseppe Iannaccone
Keyword(s):  
Neural Networks ◽  
Memory Cell ◽  
Floating Gate ◽  
Floating Gate Memory ◽  
Analog Neural Networks

A Floating-Gate-Based Four-Channel Reconfigurable Analog Front-End Integrated Circuit

2021 ◽  
Author(s):  
Zu-Jia Lo ◽  
Bipasha Nath ◽  
Yuan-Chuan Wang ◽  
Yun-Jie Huang ◽  
Hui-Chun Huang ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Floating Gate ◽  
Front End ◽  
Analog Front End

scholarly journals Multifunctional molybdenum disulfide flash memory using a PEDOT:PSS floating gate

2021 ◽  
Vol 13 (1) ◽  
Author(s):  
Seongin Hong ◽  
Junwoo Park ◽  
Jung Joon Lee ◽  
Sunjong Lee ◽  
Kyungho Yun ◽  
...  
Keyword(s):  
Molybdenum Disulfide ◽  
Flash Memory ◽  
Floating Gate ◽  
Bending Test ◽  
Light Illumination ◽  
Transition Metal Dichalcogenide ◽  
Large Memory ◽  
Temperature Solution ◽  
Multilevel Memory ◽  
Floating Layer

AbstractTwo-dimensional transition metal dichalcogenide materials (TMDs), such as molybdenum disulfide (MoS2), have been considered promising candidates for future electronic applications owing to their electrical, mechanical, and optical properties. Here, we present a new concept for multifunctional MoS2 flash memory by combining a MoS2 channel with a PEDOT:PSS floating layer. The proposed MoS2 memory devices exhibit a switching ratio as high as 2.3 × 107, a large memory window (54.6 ± 7.80 V), and high endurance (>1,000 cycles). As the PEDOT:PSS film enables a low-temperature solution-coating process and mechanical flexibility, the proposed P-memory can be embedded on a polyimide substrate over a rigid silicon substrate, offering high mechanical endurance (over 1,000 cycle bending test). Furthermore, both MoS2 and PEDOT:PSS have a bandgap that is desirable in optoelectronic memory operation, where charge carriers are stored differently in the floating gate depending on light illumination. As a new application that combines photodiodes and memory functions, we demonstrate multilevel memory programming based on light intensity and color.

Floating Gate Schottky Junction Solar Cells With Improved Output Power

2020 ◽  
pp. 1-5
Author(s):  
Amirhossein Ghods ◽  
Vishal Saravade ◽  
Andrew Woode ◽  
Corey Lerner ◽  
Chuanle Zhou ◽  
...  
Keyword(s):  
Solar Cells ◽  
Output Power ◽  
Floating Gate ◽  
Schottky Junction
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