4754215 Self-diagnosable integrated circuit device capable of testing sequential circuit elements

1989 ◽  
Vol 29 (2) ◽  
pp. 292
Author(s):  
Masato Kawai
1992 ◽  
Author(s):  
G. Allen Vawter ◽  
Vincent M. Hietala ◽  
Stanley H. Kravitz ◽  
Richard F. Carson ◽  
Marcelino G. Armendariz ◽  
...  

2020 ◽  
Vol 12 (4) ◽  
pp. 47-55
Author(s):  
Vladimir Zolnikov ◽  
Yu. Chevychelov ◽  
V. Lavlinskiy ◽  
A. Achkasov ◽  
Akim Tolkachev ◽  
...  

The article is devoted to the design of RAM blocks as part of microprocessor systems and methods for ensuring fault tolerance. The structural scheme of RAM and the process of influence of heavy charged particles on the integrated circuit (IC) of memory are considered. Special attention is paid to the influence of the biopolar effect on the fault stability of the IC elements, as well as to the emerging multibit events. The article analyzes the various phases of RAM operation and the reactions of memory circuit elements to the occurrence of failures caused by the hit of HCP.


1999 ◽  
Vol 15 (3) ◽  
pp. 24-27 ◽  
Author(s):  
K.E. Lonngren ◽  
Er-Wei Bai

2017 ◽  
Vol 46 (7) ◽  
pp. 474-477
Author(s):  
Y. A. Chaplygin ◽  
T. Y. Krupkina ◽  
A. Y. Krasukov ◽  
E. A. Artamonova

2014 ◽  
Vol 23 (02) ◽  
pp. 1450016
Author(s):  
JIANLI CHEN ◽  
WENXING ZHU

The very large-scale integrated circuit (VLSI) placement problem is to determine the exact location of each movable circuit element within a given region. It is a crucial process in physical design, since it affects performance, power consumption, routability, and heat distribution of a design. In this paper, we propose a VLSI placement flow to handle the large-scale mixed-size placement problem. The main idea of our placement flow is using a floorplanning algorithm to guide the placement of circuit elements. It consists of four steps: (1) With the multilevel framework, circuit elements are clustered into blocks by recursively partitioning; (2) a floorplanning algorithm is performed on every level of the blocks; (3) the macro cells are shifted by a macro shifting technique to determine their exact locations; (4) with each macro cell location fixed, a standard cell placement algorithm is applied to place the remaining objects. The proposed approach is tested on the IBM mixed-size benchmarks and the modern mixed-size (MMS) placement benchmarks. Experimental results show that our approach outperforms the state-of-the-art placers on the solution quality for most of the benchmarks.


Technologies ◽  
2019 ◽  
Vol 7 (3) ◽  
pp. 64 ◽  
Author(s):  
Esteban Tlelo-Coyotecatl ◽  
Alejandro Díaz-Sánchez ◽  
José Miguel Rocha-Pérez ◽  
Jose Luis Vázquez-González ◽  
Luis Abraham Sánchez-Gaspariano ◽  
...  

Active filter design is a mature topic that provides good solutions that can be implemented using discrete devices or integrated circuit technology. For instance, when the filter topologies are implemented using commercially available operational amplifiers (opamps), one can explore varying circuit parameters to tune the central frequency or enhance the quality (Q) factor. We show the addition of a feedback loop in the signal flow graph of a biquadratic filter topology, which enhances Q and highlights that a sensitivity analysis can be performed to identify which circuit elements influence central frequency, Q, or both. In this manner, we show the opamp-based implementation of a biquadratic bandpass filter, in which Q is enhanced through performing a sensitivity analysis for each circuit element. Equations for the central frequency and Q are provided to observe that there is not a direct parameter that enhances them, but we show that from sensitivity analysis one can identify the circuit elements that better enhance Q-factor.


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