Introduction:
Intrinsic resistive switching properties of Pt/TiO2-x/TiO2/Pt crossbar memory
array has been examined using the crossbar (4×4) arrays fabricated by using DC/RF sputtering under
specific conditions at room temperature.
Materials and Methods:
The growth of filament is envisaged from bottom electrode (BE) towards the
top electrode (TE) by forming conducting nano-filaments across TiO2/TiO2-x bilayer stack. Non-linear
pinched hysteresis curve (a signature of memristor) is evident from I-V plot measured using Pt/TiO2-x
/TiO2/Pt bilayer device (a single cell amongst the 4×4 array is used). It is found that the observed I-V
profile shows two distinguishable regions of switching symmetrically in both SET and RESET cycle.
Distinguishable potential profiles are evident from I-V curve; in which region-1 relates to the electroformation
prior to switching and region-2 shows the switching to ON state (LRS). It is observed that
upon reversing the polarity, bipolar switching (set and reset) is evident from the facile symmetric
pinched hysteresis profile. Obtaining such a facile switching is attributed to the desired composition of
Titania layers i.e. the rutile TiO2 (stoichiometric) as the first layer obtained via controlled post annealing
(650oC/1h) process onto which TiO2-x (anatase) is formed (350oC/1h).
Results:
These controlled processes adapted during the fabrication step help manipulate the desired potential
barrier between metal (Pt) and TiO2 interface. Interestingly, this controlled process variation is found
to be crucial for measuring the switching characteristics expected in Titania based memristor. In order to
ensure the formation of rutile and anatase phases, XPS, XRD and HRSEM analyses have been carried out.
Conclusion:
Finally, the reliability of bilayer memristive structure is investigated by monitoring the
retention (104 s) and endurance tests which ensured the reproducibility over 10,000 cycles.
Tuning Oxygen Vacancies and Resistive Switching Properties in Ultra-Thin HfO2 RRAM via TiN Bottom Electrode and Interface Engineering
