New trench gate power MOSFET with high breakdown voltage and reduced on-resistance using a SiGe zone in drift region

2012 ◽  
Vol 12 (5) ◽  
pp. 1340-1344 ◽  
Author(s):  
Mahsa Mehrad ◽  
Ali A. Orouji
Materials ◽  
2020 ◽  
Vol 13 (11) ◽  
pp. 2581
Author(s):  
Meng Zhang ◽  
Baikui Li ◽  
Jin Wei

The application of conventional power metal-oxide-semiconductor field-effect transistor (MOSFET) is limited by the famous one-dimensional “silicon limit” (1D-limit) in the trade-off relationship between specific on-resistance (RSP) and breakdown voltage (BV). In this paper, a new power MOSFET architecture is proposed to achieve a beyond-1D-limit RSP-BV trade-off. Numerical TCAD (technology computer-aided design) simulations were carried out to comparatively study the proposed MOSFET, the conventional power MOSFET, and the superjunction MOSFET. All the devices were designed with the same breakdown voltage of ~550 V. The proposed MOSFET features a deep trench between neighboring p-bodies and multiple p-islands located at the sidewall and bottom of the trench. The proposed MOSFET allows a high doping concentration in the drift region, which significantly reduces its RSP compared to the conventional power MOSFET. The multiple p-islands split the electric field into multiple peaks and help the proposed MOSFET maintain a similar breakdown voltage to the conventional power MOSFET with the same drift region thickness. Another famous device technology, the superjunction MOSFET (SJ-MOSFET), also breaks the 1D-limit. However, the SJ-MOSFET suffers a snappy reverse recovery performance, which is a notorious drawback of SJ-MOSFET and limits the range of its application. On the contrary, the proposed MOSFET presents a superior reverse recovery performance and can be used in various power switching applications where hard commutation is required.


2008 ◽  
Vol 600-603 ◽  
pp. 1115-1118 ◽  
Author(s):  
Kenya Yamashita ◽  
Kyoko Egashira ◽  
Koichi Hashimoto ◽  
Kunimasa Takahashi ◽  
Osamu Kusumoto ◽  
...  

In order for SiC-MOSFET to be practical in various power electronics applications, low specific on-resistance Ron,sp, high breakdown voltage and “normally-off” characteristics have to be fulfilled even at high temperature. We fabricated a SiC-MOSFET employing a submicron gate with channel length Lg of 0.5μm by a self-aligned implantation and aδ-doped epitaxial channel layer to successfully demonstrate the following features. The normally-off characteristics was confirmed from room temperature to 200°C where the therethold voltages Vth were 2.9V at room temperature and 1.6V at 200°C, respectively. The Ron,sp were 4.6mΩcm2 at room temperature and 9.2mΩcm2 at 200°C, respectively, while the breakdown voltage was greater than 1400V .


2019 ◽  
Vol 8 (7) ◽  
pp. Q3229-Q3234 ◽  
Author(s):  
Yen-Ting Chen ◽  
Jiancheng Yang ◽  
Fan Ren ◽  
Chin-Wei Chang ◽  
Jenshan Lin ◽  
...  

2013 ◽  
Vol 347-350 ◽  
pp. 1535-1539
Author(s):  
Jian Jun Zhou ◽  
Liang Li ◽  
Hai Yan Lu ◽  
Ceng Kong ◽  
Yue Chan Kong ◽  
...  

In this letter, a high breakdown voltage GaN HEMT device fabricated on semi-insulating self-standing GaN substrate is presented. High quality AlGaN/GaN epilayer was grown on self-standing GaN substrate by metal organic chemical vapor deposition. A 0.8μm gate length GaN HEMT device was fabricated with oxygen plasma treatment. By using oxygen plasma treatment, gate forward working voltage is increased, and a breakdown voltage of more than 170V is demonstrated. The measured maximum drain current of the device is larger than 700 mA/mm at 4V gate bias voltage. The maximum transconductance of the device is 162 mS/mm. In addition, high frequency performance of the GaN HEMT device is also obtained. The current gain cutoff frequency and power gain cutoff frequency are 19.7 GHz and 32.8 GHz, respectively. A high fT-LG product of 15.76 GHzμm indicating that homoepitaxy technology is helpful to improve the frequency performance of the device.


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