scholarly journals Design Rules for High-Valent Redox in Intercalation Electrodes

Joule ◽  
2020 ◽  
Vol 4 (7) ◽  
pp. 1369-1397 ◽  
Author(s):  
William E. Gent ◽  
Iwnetim Iwnetu Abate ◽  
Wanli Yang ◽  
Linda F. Nazar ◽  
William C. Chueh
TAPPI Journal ◽  
2018 ◽  
Vol 17 (01) ◽  
pp. 31-37
Author(s):  
Bryan McCulloch ◽  
John Roper ◽  
Kaitlin Rosen

Barrier coatings are used in applications including food packaging, dry goods, and consumer products to prevent transport of different compounds either through or into paper and paperboard substrates. These coatings are useful in packaging to contain active ingredients, such as fragrances, or to protect contents from detrimental substances, such as oxygen, water, grease, or other chemicals of concern. They also are used to prevent visual changes or mechanical degradation that might occur if the paper becomes saturated. The performance and underlying mechanism depends on the barrier coating type and, in particular, on whether the barrier coating is designed to prevent diffusive or capillary transport. Estimates on the basis of fundamental transport phenomena and data from a broad screening of different barrier materials can be used to understand the limits of various approaches to construct barrier coatings. These estimates also can be used to create basic design rules for general classes of barrier coatings.


2018 ◽  
Author(s):  
Dominic Bara ◽  
Claire Wilson ◽  
Max Mörtel ◽  
Marat M. Khusniyarov ◽  
ben slater ◽  
...  

Phase control in the self-assembly of metal-organic frameworks (MOFs) – materials wherein organic ligands connect metal ions or clusters into network solids with potential porosity – is often a case of trial and error. Judicious control over a number of synthetic variables is required to select for the desired topology and control features such as interpenetration and defectivity, which have significant impact on physical properties and application. Herein, we present a comprehensive investigation of self-assembly in the Fe-biphenyl-4,4'-dicarboxylate system, demonstrating that coordination modulation, the addition of competing ligands into solvothermal syntheses, can reliably tune between the kinetic product, non-interpenetrated MIL-88D(Fe), and the thermodynamic product, two-fold interpenetrated MIL-126(Fe). DFT simulations reveal that correlated disorder of the terminal anions on the metal clusters in the interpentrated phase results in H-bonding between adjacent nets and is the thermodynamic driving force for its formation. Coordination modulation slows self-assembly and therefore selects the thermodynamic product MIL-126(Fe), while offering fine control over defectivity, inducing mesoporosity, but electron microscopy shows the MIL-88D(Fe) phase persists in many samples despite not being evident in diffraction experiments, suggesting its presence accounts for the lower than predicted surface areas reported for samples to date. Interpenetration control is also demonstrated by utilizing the 2,2'-bipyridine-5,5'-dicarboxylate linker; DFT simulations show that it is energetically prohibitive for it to adopt the twisted conformation required to form the interpenetrated phase, and are confirmed by experimental data, although multiple alternative phases are identified due to additional coordination of the Fe cations to the N-donors of the ligand. Finally, we introduce oxidation modulation – the concept of using metal precursors in a different oxidation state to that found in the final MOF – as a further protocol to kinetically control self-assembly. Combining coordination and oxidation modulation allows the synthesis of pristine MIL-126(Fe) with BET surface areas close to the predicted maximum capacity for the first time, suggesting that combining the two may be a powerful methodology for the controlled self-assembly of high-valent MOFs.<br><br>


2008 ◽  
Vol 2 (1) ◽  
pp. 1-5
Author(s):  
Thomas Page ◽  
Gisli Thorsteinsson

Author(s):  
Yoav Weizman ◽  
Ezra Baruch

Abstract In recent years, two new techniques were introduced for flip chip debug; the Laser Voltage Probing (LVP) technique and Time Resolved Light Emission Microscopy (TRLEM). Both techniques utilize the silicon’s relative transparency to wavelengths longer than the band gap. This inherent wavelength limitation, together with the shrinking dimensions of modern CMOS devices, limit the capabilities of these tools. It is known that the optical resolution limits of the LVP and TRLEM techniques are bounded by the diffraction limit which is ~1um for both tools using standard optics. This limitation was reduced with the addition of immersion lens optics. Nevertheless, even with this improvement, shrinking transistor geometry is leading to increased acquisition time, and the overlapping effect between adjacent nodes remains a critical issue. The resolution limit is an order of magnitude above the device feature densities in the &lt; 90nm era. The scaling down of transistor geometry is leading to the inevitable consequence where more than 50% of the transistors in 90nm process have widths smaller than 0.4um. The acquisition time of such nodes becomes unreasonably long. In order to examine nodes in a dense logic cuicuit, cross talk and convolution effects between neighboring signals also need to be considered. In this paper we will demonstrate the impact that these effects may have on modern design. In order to maintain the debug capability, with the currently available analytical tools for future technologies, conceptual modification of the FA process is required. This process should start on the IC design board where the VLSI designer should be familiar with FA constraints, and thus apply features that will enable enhanced FA capabilities to the circuit in hand during the electrical design or during the physical design stages. The necessity for reliable failure analysis in real-time should dictate that the designer of advanced VLSI blocks incorporates failure analysis constraints among other design rules. The purpose of this research is to supply the scientific basis for the optimal incorporation of design rules for optical probing in the &lt; 90nm gate era. Circuit designers are usually familiar with the nodes in the design which are critical for debug, and the type of measurement (logic or DC level) they require. The designer should enable the measurement of these signals by applying certain circuit and physical constraints. The implementation of these constraints may be done at the cell level, the block level or during the integration. We will discuss the solutions, which should be considered in order to mitigate tool limitations, and also to enable their use for next generation processes.


Author(s):  
Peter Egger ◽  
Stefan Müller ◽  
Martin Stiftinger

Abstract With shrinking feature size of integrated circuits traditional FA techniques like SEM inspection of top down delayered devices or cross sectioning often cannot determine the physical root cause. Inside SRAM blocks the aggressive design rules of transistor parameters can cause a local mismatch and therefore a soft fail of a single SRAM cell. This paper will present a new approach to identify a physical root cause with the help of nano probing and TCAD simulation to allow the wafer fab to implement countermeasures.


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