Minimization of digital logic gates and ultra-low power AES encryption core in 180CMOS technology

2020 ◽  
Vol 74 ◽  
pp. 103000 ◽  
Author(s):  
V. Nandan ◽  
R. Gowri Shankar Rao
2011 ◽  
Vol 58 (1) ◽  
pp. 236-250 ◽  
Author(s):  
Hei Kam ◽  
Tsu-Jae King Liu ◽  
Vladimir Stojanovi? ◽  
Dejan Markovic ◽  
Elad Alon

2019 ◽  
Vol 35 (3) ◽  
pp. 311-317 ◽  
Author(s):  
Lu Liu ◽  
Vinay Saripalli ◽  
Euichul Hwang ◽  
Vijay Narayanan ◽  
Suman Datta

Electronics ◽  
2021 ◽  
Vol 10 (17) ◽  
pp. 2097
Author(s):  
Vasiliki Gogolou ◽  
Konstantinos Kozalakis ◽  
Eftichios Koutroulis ◽  
Gregory Doumenis ◽  
Stylianos Siskos

This work presents an ultra-low-power CMOS supercapacitor storage unit suitable for a plethora of low-power autonomous applications. The proposed unit exploits the unregulated voltage output of harvesting circuits (i.e., DC-DC converters) and redirects the power to the storage elements and the working loads. Being able to adapt to the input energy conditions and the connected loads' supply demands offers extended survival to the system with the self-startup operation and voltage regulation. A low-complexity control unit is implemented which is composed of power switches, comparators and logic gates and is able to supervise two supercapacitors, a small and a larger one, as well as a backup battery. Two separate power outputs are offered for external load connection which can be controlled by a separate unit (e.g., microcontroller). Furthermore, user-controlled parameters such as charging and discharging supercapacitor voltage thresholds, provide increased versatility to the system. The storage unit was designed and fabricated in a 0.18 um standard CMOS process and operates with ultra-low current consumption of 432 nA at 2.3 V. The experimental results validate the proper operation of the overall structure.


Author(s):  
Fazel Sharifi ◽  
Mohammad Hossein Moaiyeri ◽  
Keivan Navi ◽  
Nader Bagherzadeh

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