Advanced TEM sample preparation techniques for submicron Si devices

Author(s):  
P. B. Basham ◽  
H. L. Tsai

The use of transmission electron microscopy (TEM) to support process development of advanced microelectronic devices is often challenged by a large amount of samples submitted from wafer fabrication areas and specific-spot analysis. Improving the TEM sample preparation techniques for a fast turnaround time is critical in order to provide a timely support for customers and improve the utilization of TEM. For the specific-area sample preparation, a technique which can be easily prepared with the least amount of effort is preferred. For these reasons, we have developed several techniques which have greatly facilitated the TEM sample preparation.For specific-area analysis, the use of a copper grid with a small hole is found to be very useful. With this small-hole grid technique, TEM sample preparation can be proceeded by well-established conventional methods. The sample is first polished to the area of interest, which is then carefully positioned inside the hole. This polished side is placed against the grid by epoxy Fig. 1 is an optical image of a TEM cross-section after dimpling to light transmission.

Author(s):  
Roger Alvis ◽  
Bryan Tracy

The many advantages of transmission electron microscopy (TEM) over other microscopy techniques areoften offset only by one drawback: slow turnaround time. Because of the fact that the time required to complete a multi-sample analysis is directly proportional to the number of samples submitted, TEM is often not a viable tool to analyze an entire fabrication process run or a multi wafer process development experiment. However, we have developed a technique that has allowed a single person to prepareas many as six cross-sectional TEM samples in one day thereby affording the opportunity for the investigation of an entire experimental matrix in a relatively short time.This improvement in throughput is achieved by our approach to sample preparation which combines features of the Bravman-Sinclair method with the Tripod polishing technique developed by Benedict and wide tool dimpling described by Humiston. In essence, the standard dummy dice of the Bravman techniqueare replaced by "real" device dice which have been thinned to less than 50°m using the Tripod polisher. This type of mechanical back lapping was first suggested by Marcus and Sheng. Our experiments with this type of sample preparation have been applied to both failure analysis and process development applications.


Author(s):  
Stanley J. Klepeis ◽  
J.P. Benedict ◽  
R.M Anderson

The ability to prepare a cross-section of a specific semiconductor structure for both SEM and TEM analysis is vital in characterizing the smaller, more complex devices that are now being designed and manufactured. In the past, a unique sample was prepared for either SEM or TEM analysis of a structure. In choosing to do SEM, valuable and unique information was lost to TEM analysis. An alternative, the SEM examination of thinned TEM samples, was frequently made difficult by topographical artifacts introduced by mechanical polishing and lengthy ion-milling. Thus, the need to produce a TEM sample from a unique,cross-sectioned SEM sample has produced this sample preparation technique.The technique is divided into an SEM and a TEM sample preparation phase. The first four steps in the SEM phase: bulk reduction, cleaning, gluing and trimming produces a reinforced sample with the area of interest in the center of the sample. This sample is then mounted on a special SEM stud. The stud is inserted into an L-shaped holder and this holder is attached to the Klepeis polisher (see figs. 1 and 2). An SEM cross-section of the sample is then prepared by mechanically polishing the sample to the area of interest using the Klepeis polisher. The polished cross-section is cleaned and the SEM stud with the attached sample, is removed from the L-shaped holder. The stud is then inserted into the ion-miller and the sample is briefly milled (less than 2 minutes) on the polished side. The sample on the stud may then be carbon coated and placed in the SEM for analysis.


Author(s):  
Hyoung H. Kang ◽  
Michael A. Gribelyuk ◽  
Oliver D. Patterson ◽  
Steven B. Herschbein ◽  
Corey Senowitz

Abstract Cross-sectional style transmission electron microscopy (TEM) sample preparation techniques by DualBeam (SEM/FIB) systems are widely used in both laboratory and manufacturing lines with either in-situ or ex-situ lift out methods. By contrast, however, the plan view TEM sample has only been prepared in the laboratory environment, and only after breaking the wafer. This paper introduces a novel methodology for in-line, plan view TEM sample preparation at the 300mm wafer level that does not require breaking the wafer. It also presents the benefit of the technique on electrically short defects. The methodology of thin lamella TEM sample preparation for plan view work in two different tool configurations is also presented. The detailed procedure of thin lamella sample preparation is also described. In-line, full wafer plan view (S)TEM provides a quick turn around solution for defect analysis in the manufacturing line.


Author(s):  
R.J. Young ◽  
A. Buxbaum ◽  
B. Peterson ◽  
R. Schampers

Abstract Scanning transmission electron microscopy with scanning electron microscopes (SEM-STEM) has become increasing used in both SEM and dual-beam focused ion beam (FIB)-SEM systems. This paper describes modeling undertaken to simulate the contrast seen in such images. Such modeling provides the ability to help understand and optimize imaging conditions and also support improved sample preparation techniques.


1998 ◽  
Vol 523 ◽  
Author(s):  
C. Amy Hunt ◽  
Yuhong Zhang ◽  
David Su

AbstractTransmission electron microscopy (TEM) is a useful tool in process evaluation and failure analysis for semiconductor industries. A common focus of semiconductor TEM analyses is metalization vias (plugs) and it is often desirable to cross-section through a particular one. If the cross-sectional plane deviates away from the center of the plug, then the thin adhesion layer around the plug will be blurred by surrounding materials such as the inter-layer dielectric and the plug material. The importance of these constraints, along with the difficulty of precision sample preparation, has risen sharply as feature sizes have fallen to 0.25 μm and below. The suitability of common sample preparation techniques for these samples is evaluated.


2000 ◽  
Vol 6 (S2) ◽  
pp. 528-529
Author(s):  
C. Urbanik Shannon ◽  
L. A. Giannuzzi ◽  
E. M. Raz

Automated specimen preparation for transmission electron microscopy has the obvious advantage of saving personnel time. While some people may perform labor intensive specimen preparation techniques quickly, automated specimen preparation performed in a timely and reproducible fashion can significantly improve the throughput of specimens in an industrial laboratory. The advent of focused ion beam workstations for the preparation of electron transparent membranes has revolutionized TEM specimen preparation. The FIB lift-out technique is a powerful specimen preparation method. However, there are instances where the “traditional” FIB method of specimen preparation may be more suitable. The traditional FIB method requires that specimens must be prepared so that the area of interest is as thin as possible (preferably less than 50 μm) prior to FIB milling. Automating the initial specimen preparation for brittle materials (e.g., Si wafers) may be performed using the combination of cleaving and sawing techniques as described below.


Author(s):  
S. J. Kirch ◽  
Ron Anderson ◽  
Stanley J. Klepeis

The continuing reduction in the sizes of features of interest for integrated circuit failure analysis requires greater precision in transmission electron microscopy (TEM) sample preparation. With minimum feature sizes approaching 0.5 μm, the mere finding of such a feature at a polished edge, let alone preparing a TEM sample containing it becomes a formidable task. The required substantial thinning also increases the risk of loss of what may be a unique sample.We present in this paper a technique that allows localized thinning of cross-sectional TEM samples using a focused ion beam (FIB) machine. Standard preparation techniques are used to make a cross-sectional TEM sample that would otherwise be too thick to be very useful for TEM analysis. This sample is then placed in the FIB machine, which is used as a micromachining tool. No special surface preparation is necessary and the secondary electron signal generated by the ion beam provides an image that can be used to locate the feature of interest.


1998 ◽  
Vol 4 (S2) ◽  
pp. 862-863 ◽  
Author(s):  
B. Foran ◽  
F. Shaapur ◽  
V. Blaschke

Sample preparation for transmission electron microscopy (TEM) has been a source of speculation with regards to potential for the creation of artifacts which may confound data gleaned from TEM analysis. For semiconductor integrated circuit (IC) materials characterization, the most common sample preparatory methods are based on final thinning by ion beam milling. The latest shift towards Copper / low dielectric constant (k) composite systems in the semiconductor IC industry provides several challenges for TEM sample preparation resulting from differences in milling rates and materials properties for neighboring features.In conjunction with process development for integration of Cu / low-k materials, conducted at SEMATECH, we have systematically studied the effects of TEM sample preparation by ion milling in order to search for artifacts that could result from sample thinning procedures. For this purpose we have studied wafers with patterned copper lines isolated by a low-k polymer. One sample was stressed by thermal and electronic bias, while a second was subjected to only thermal stress.


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