The wafer-scale integration of graphene is of great importance in view of its numerous applications proposed or underway. A good graphene–silicon interface requires the fine control of several parameters and may turn into a high-cost material, suitable for the most advanced applications. Procedures that can be of great use for a wide range of applications are already available, but others are to be found, in order to modulate the offer of different types of materials, at different levels of sophistication and use. We have been exploring different electrochemical approaches over the last 5 years, starting from graphene oxide and resulting in graphene deposited on silicon-oriented surfaces, with the aim of understanding the reactions leading to the re-establishment of the graphene network. Here, we report how a proper choice of both the chemical environment and electrochemical conditions can lead to a more controlled and tunable graphene–Si(111) interface. This can also lead to a deeper understanding of the electrochemical reactions involved in the evolution of graphene oxide to graphene under electrochemical reduction. Results from XPS, the most suitable tool to follow the presence and fate of functional groups at the graphene surface, are reported, together with electrochemical and Raman findings.
Effect of Electrolytic Medium on the Electrochemical Reduction of Graphene Oxide on Si(111) as Probed by XPS
