A Study on High Density Gate-Oxide Anti-Fuse PROM Memory Cell Program Features

MATEC Web of Conferences ◽

10.1051/matecconf/20167510004 ◽

2016 ◽

Vol 75 ◽

pp. 10004

Author(s):

Keqin Yang ◽

Suge Yue ◽

Shijin Lu

Keyword(s):

Memory Cell ◽

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Control of Plasma Damage to Gate Oxide during High Density Plasma Chemical Vapor Deposition

Journal of The Electrochemical Society ◽

10.1149/1.2048449 ◽

1995 ◽

Vol 142 (11) ◽

pp. L208-L211 ◽

Author(s):

Subhas Bothra ◽

Calvin T. Gabriel ◽

Stephan Lassig ◽

David Pirkle

Keyword(s):

Chemical Vapor Deposition ◽

Vapor Deposition ◽

Chemical Vapor ◽

High Density ◽

Plasma Chemical ◽

Plasma Damage ◽

Plasma Chemical Vapor Deposition ◽

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A novel leakage current separation technique in a direct tunneling regime gate oxide SONOS memory cell

IEEE International Electron Devices Meeting 2003 ◽

10.1109/iedm.2003.1269357 ◽

2004 ◽

Author(s):

S.S. Chung ◽

P.-Y. Chiang ◽

G. Chou ◽

C.-T. Huang ◽

P. Chen ◽

...

Keyword(s):

Leakage Current ◽

Memory Cell ◽

Separation Technique ◽

Direct Tunneling

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High Density Plasma Enhanced Atomic Layer Deposition of Lanthanum Oxide for High-k Gate Oxide Material

ECS Meeting Abstracts ◽

10.1149/ma2005-01/7/344 ◽

2005 ◽

Keyword(s):

Atomic Layer Deposition ◽

Lanthanum Oxide ◽

Atomic Layer ◽

High Density ◽

Oxide Material ◽

Layer Deposition ◽

High K ◽

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Novel SONOS and Floating-Gate Flash Memory Cell Structures for High Density and High Reliability Applications

ECS Meeting Abstracts ◽

10.1149/ma2007-02/25/1296 ◽

2007 ◽

Keyword(s):

Flash Memory ◽

High Reliability ◽

Memory Cell ◽

High Density ◽

Floating Gate ◽

Cell Structures ◽

Flash Memory Cell

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Ag Ionic Memory Cell Technology for Terabit-Scale High-Density Application

2019 Symposium on VLSI Technology ◽

10.23919/vlsit.2019.8776568 ◽

2019 ◽

Author(s):

Shosuke Fujii ◽

Reika Ichihara ◽

Takuya Konno ◽

Marina Yamaguchi ◽

Harumi Seki ◽

...

Keyword(s):

Memory Cell ◽

High Density ◽

Cell Technology

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A trimless, 0.5V–1.0V wide voltage operation, high density SRAM macro utilizing dynamic cell stability monitor and multiple memory cell access

IEEE Asian Solid-State Circuits Conference 2011 ◽

10.1109/asscc.2011.6123627 ◽

2011 ◽

Author(s):

K. Kushida ◽

O. Hirabayashi ◽

F. Tachibana ◽

H. Hara ◽

A. Kawasumi ◽

...

Keyword(s):

Memory Cell ◽

High Density ◽

Dynamic Cell ◽

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Programming dynamics of a single electron memory cell with a high-density SiGe nanocrystal array at room temperature

1999 57th Annual Device Research Conference Digest (Cat. No.99TH8393) ◽

10.1109/drc.1999.806350 ◽

2003 ◽

Author(s):

Dong-Hyuk Chae ◽

Tae-Sik Yoon ◽

Dae Hwan Kim ◽

Jang-Yeon Kwon ◽

Ki-Bum Kim ◽

...

Keyword(s):

Room Temperature ◽

Memory Cell ◽

High Density ◽

Single Electron

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A novel memory cell architecture for high-density DRAMs

Symposium on VLSI Circuits ◽

10.1109/vlsic.1989.1037509 ◽

1989 ◽

Author(s):

Ohta ◽

Mimoto ◽

Torimaru ◽

Miyake

Keyword(s):

Memory Cell ◽

High Density ◽

Cell Architecture

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A high-density dual-port memory cell operation and array architecture for ULSI DRAMs

IEEE Journal of Solid-State Circuits ◽

10.1109/4.126551 ◽

1992 ◽

Vol 27 (4) ◽

pp. 610-617 ◽

Author(s):

H. Hidaka ◽

K. Arimoto ◽

K. Fujishima

Keyword(s):

Memory Cell ◽

High Density ◽

Array Architecture

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A New High-Density Twin-Gate Isolation One-Time Programmable Memory Cell in Pure 28-nm CMOS Logic Process

IEEE Transactions on Electron Devices ◽

10.1109/ted.2014.2371617 ◽

2015 ◽

Vol 62 (1) ◽

pp. 121-127 ◽

Author(s):

Woan Yun Hsiao ◽

Ping Chun Peng ◽

Tzong-Sheng Chang ◽

Yu-Der Chih ◽

Wu-Chin Tsai ◽

...

Keyword(s):

Memory Cell ◽

High Density ◽

Logic Process ◽

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