Low-leakage current and high-breakdown voltage GaAs-based heterostructure field-effect transistor with In0.5(Al0.66Ga0.34)0.5P Schottky layer

1999 ◽  
Vol 75 (22) ◽  
pp. 3551-3553 ◽  
Author(s):  
Y. S. Lin ◽  
W. C. Hsu ◽  
C. S. Yang
2006 ◽  
Vol 45 (No. 11) ◽  
pp. L319-L321 ◽  
Author(s):  
Norio Tsuyukuchi ◽  
Kentaro Nagamatsu ◽  
Yoshikazu Hirose ◽  
Motoaki Iwaya ◽  
Satoshi Kamiyama ◽  
...  

1999 ◽  
Vol 14 (4) ◽  
pp. 307-311 ◽  
Author(s):  
Wen-Lung Chang ◽  
Shiou-Ying Cheng ◽  
Yung-Hsin Shie ◽  
Hsi-Jen Pan ◽  
Wen-Shiung Lour ◽  
...  

1990 ◽  
Author(s):  
Tai Ping Sun ◽  
Si-Chen Lee ◽  
Kou-Chen Liu ◽  
Sheng-Jehn Yang

2014 ◽  
Vol 7 (4) ◽  
pp. 041003 ◽  
Author(s):  
Joseph J. Freedsman ◽  
Takashi Egawa ◽  
Yuya Yamaoka ◽  
Yoshiki Yano ◽  
Akinori Ubukata ◽  
...  

2021 ◽  
Author(s):  
Garima Jain ◽  
Ravinder Singh Sawhney ◽  
Ravinder Kumar ◽  
Amit Saini

Abstract In this paper, a novel vertically stacked silicon Nanosheet Tunnel Field Effect Transistor (NS-TFET) device scaled to a gate length of 12nm with Contact poly pitch (CPP) of 48nm is simulated. NS-TFET device is investigated for its electrostatics characteristics using technology computer-aided design (TCAD) simulator. The inter-band tunneling mechanism with a P-I-N layout has been incorporated in the stacked nanosheet devices. The asymmetric design technique for doping has been used for optimum results. NS-TFET provides a low leakage current of order10-16 A, an excellent subthreshold swing (SW) of 23mv/decade, and negligible drain induced barrier lowering (DIBL) having a value of 10.5 mv/V. The notable ON to OFF current ratio of the order of 1011 has been achieved. The device exhibits a high transconductance of 3.022x10-5 S at the gate to source voltage of 1V. NS-TFET shows tremendous improvement in short channel effects (SCE) and is a good option for advanced technologies.


2004 ◽  
Author(s):  
Seung-Chul Lee ◽  
Jin-Cherl Her ◽  
Min-Woo Ha ◽  
Kwang-Seok Seo ◽  
Min-Koo Han

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