Low-Leakage-Current Enhancement-Mode AlGaN/GaN Heterostructure Field-Effect Transistor Using p-Type Gate Contact

2006 ◽  
Vol 45 (No. 11) ◽  
pp. L319-L321 ◽  
Author(s):  
Norio Tsuyukuchi ◽  
Kentaro Nagamatsu ◽  
Yoshikazu Hirose ◽  
Motoaki Iwaya ◽  
Satoshi Kamiyama ◽  
...  
2005 ◽  
Vol 892 ◽  
Author(s):  
Norio Tsuyukuchi ◽  
Kentaro Nagamatsu ◽  
Yoshikazu Hirose ◽  
Motoaki Iwaya ◽  
Satoshi Kamiyama ◽  
...  

AbstractA normally off-mode AlGaN/GaN heterostructure field effect transistor (HFET) using a p-type GaN gate was fabricated and their static properties were compared with those of HFET having a Schottky gate. HFET having a p-GaN gate contact shows a very low leakage current density of 18.2 μA/mm at VGS and VDS of 0 V and 20 V, respectively.


2021 ◽  
Author(s):  
Garima Jain ◽  
Ravinder Singh Sawhney ◽  
Ravinder Kumar ◽  
Amit Saini

Abstract In this paper, a novel vertically stacked silicon Nanosheet Tunnel Field Effect Transistor (NS-TFET) device scaled to a gate length of 12nm with Contact poly pitch (CPP) of 48nm is simulated. NS-TFET device is investigated for its electrostatics characteristics using technology computer-aided design (TCAD) simulator. The inter-band tunneling mechanism with a P-I-N layout has been incorporated in the stacked nanosheet devices. The asymmetric design technique for doping has been used for optimum results. NS-TFET provides a low leakage current of order10-16 A, an excellent subthreshold swing (SW) of 23mv/decade, and negligible drain induced barrier lowering (DIBL) having a value of 10.5 mv/V. The notable ON to OFF current ratio of the order of 1011 has been achieved. The device exhibits a high transconductance of 3.022x10-5 S at the gate to source voltage of 1V. NS-TFET shows tremendous improvement in short channel effects (SCE) and is a good option for advanced technologies.


2021 ◽  
Vol 7 (1) ◽  
Author(s):  
Priyadarshini N D ◽  
Nayana G H ◽  
P Vimala

Tunnel Field Effect Transistors (TFET) have demonstrated to have likely applications in the cutting-edge low force and super low force semiconductors to substitute the conventional FETs. TFET will be able to provide steep inverse subthreshold swing slope also maintaining a low leakage current, making it an essential structure for limiting the power consumption in Metal Oxide Semiconductor FETs.In this paper, we are simulating different structures of TFET by varying source material to boost the ON current of the device. The different models are designed and simulated using Silvaco TCAD simulator and transfer characteristics are studied.


2003 ◽  
Vol 42 (Part 2, No. 12A) ◽  
pp. L1422-L1424 ◽  
Author(s):  
Yu Min Lin ◽  
San Lein Wu ◽  
Shoou Jinn Chang ◽  
Shinji Koh ◽  
Yasuhiro Shiraki

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