Multi-wavelength Raman and photoluminescence characterization of implanted n+/p junctions under various rapid thermal annealing conditions

Author(s):  
Woo Sik Yoo ◽  
Takeshi Ueda ◽  
Toshikazu Ishigaki ◽  
Kitaek Kang ◽  
Kyoung Bong Rouh ◽  
...  
2011 ◽  
Author(s):  
Woo Sik Yoo ◽  
Takeshi Ueda ◽  
Toshikazu Ishigaki ◽  
Kitaek Kang ◽  
Jiro Matsuo ◽  
...  

1999 ◽  
Vol 144-145 ◽  
pp. 697-701 ◽  
Author(s):  
W.K Choi ◽  
S Kanakaraju ◽  
Z.X Shen ◽  
W.S Li

1989 ◽  
Vol 147 ◽  
Author(s):  
Samuel Chen ◽  
S.-Tong Lee ◽  
G. Braunstein ◽  
G. Rajeswaran ◽  
P. Fellinger

AbstractDefects induced by ion implantation and subsequent annealing are found to either promote or suppress layer intermixing in Ill-V compound semiconductor superlattices (SLs). We have studied this intriguing relationship by examining how implantation and annealing conditions affect defect creation and their relevance to intermixing. Layer intermixing has been induced in SLs implanted with 220 keV Si+ at doses < 1 × 1014 ions/cm2 and annealed at 850°C for 3 hrs or 1050°C for 10 s. Upon furnace annealing, significant Si in-diffusion is observed over the entire intermixed region, but with rapid thermal annealing layer intermixing is accompanied by negligible Si movement. TEM showed that the totally intermixed layers are centered around a buried band of secondary defects and below the Si peak position. In the nearsurface region layer intermixing is suppressed and is only partially completed at ≤1 × 1015 Si/cm2. This inhibition is correlated to a loss of the mobile implantation-induced defects, which are responsible for intermixing.


1989 ◽  
Vol 66 (10) ◽  
pp. 4775-4779 ◽  
Author(s):  
M. de Potter ◽  
W. De Raedt ◽  
M. Van Hove ◽  
G. Zou ◽  
H. Bender ◽  
...  

2012 ◽  
Vol 27 (9) ◽  
pp. 1314-1323 ◽  
Author(s):  
Chun-Wei Chang ◽  
Min-Hao Hong ◽  
Wei-Fan Lee ◽  
Kuan-Ching Lee ◽  
Li-De Tseng ◽  
...  

Abstract


1985 ◽  
Vol 52 ◽  
Author(s):  
C. M. Ransom ◽  
T. O. Sedgwick ◽  
S. A. Cohen

ABSTRACTDLTS measurements show that majority-carrier traps exist after quartz-lamp, rapid-thermal annealing (RTA) activation of B+ and BF2+ ion implants in n-type silicon. Levels at Ec-0.17, 0.27, 0.44 and 0.57 eV annealed out with an additional 20 minute isochronal anneal at 550°C in argon. A stable defect at 0.37 eV existed at temperatures above 750°C. DLTS measurements of a Schottky diode on n-type silicon after only RTA indicated that electron traps could be introduced into n-type silicon by the RTA alone.


2016 ◽  
Vol 75 (8) ◽  
pp. 605-613
Author(s):  
W. S. Yoo ◽  
K. Kang ◽  
H. Nishigaki ◽  
N. Hasuike ◽  
H. Harima ◽  
...  

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