Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

2016 ◽  
Vol 109 (22) ◽  
pp. 223104 ◽  
Author(s):  
Yanbin An ◽  
Aniruddh Shekhawat ◽  
Ashkan Behnam ◽  
Eric Pop ◽  
Ant Ural
Keyword(s):  
Metal Oxide ◽  
Semiconductor Devices ◽  
Tunneling Current ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Quantum Capacitance ◽  
Gate Electrodes ◽  
Gate Tunneling

Characterization of Graphene Gate Electrodes for Metal-Oxide-Semiconductor Devices

MRS Advances ◽  
2017 ◽  
Vol 2 (02) ◽  
pp. 103-108 ◽  
Author(s):  
Yanbin An ◽  
Aniruddh Shekhawat ◽  
Ashkan Behnam ◽  
Eric Pop ◽  
Ant Ural
Keyword(s):  
Metal Oxide ◽  
High Frequency ◽  
Tunneling Current ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Heterogeneous Integration ◽  
Gate Electrodes ◽  
Mos Devices ◽  
Capacitance Voltage

ABSTRACT We fabricate and characterize metal-oxide-semiconductor (MOS) devices with graphene as the gate electrode, 5 or 10 nm thick silicon dioxide as the insulator, and silicon as the semiconductor substrate. We find that Fowler-Nordheim tunneling dominates the gate current for the 10 nm oxide device. We also study the temperature dependence of the tunneling current in these devices in the range 77 to 300 K and extract the effective tunneling barrier height as a function of temperature for the 10 nm oxide device. Furthermore, by performing high frequency capacitance-voltage measurements, we observe a local capacitance minimum under accumulation, particularly for the 5 nm oxide device. By fitting the data using numerical simulations based on the modified density of states of graphene in the presence of charged impurities, we show that this local minimum results from the quantum capacitance of graphene. These results provide important insights for the heterogeneous integration of graphene into conventional silicon technology.

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