AbstractA type-I (“spike”) conduction-band offset (CBO) greater than a few tenths of an eV at the n/p interface of a solar cell can lead to significant distortion of the current-voltage (J-V) curve. Such distortion has been observed in CdS/CIS cells, low-gallium CdS/CIGS cells, and CIGS cells with alternative windows that increase the CBO. The basic feature is reduced current collection in forward bias. The distortion is mitigated by photoconductivity in the CdS or other window layer, and it is therefore more severe if the illumination contains no photons with energies greater than the band gap of the window layer. The device-physics analysis of such distortion is numerical simulation incorporating a three-layer [TCO/CdS/CI(G)S] approximation for the solar cell. The parameters that influence the barrier height, and hence the distortion, are the magnitude of the CBO, the doping of the p- and n- layers, the defect density of the CdS, and the thicknesses of the CdS and TCO layers. The key value, however, is the energy difference between the quasi-Fermi level for electrons and the conduction band at the CdS/CIS interface. Thermionic emission across the interface will limit the current collection, if the difference exceeds approximately 0.48 eV at 300 K and one-sun illumination. This constraint is consistent with experiment, and strategies to satisfy the 0.48-eV rule when designing solar cells are enumerated.
The effects of strain and composition on the conduction-band offset of direct band gap type-I GeSn/GeSnSi quantum dots for CMOS compatible mid-IR light source