scholarly journals Quasi-static analysis of susceptibility of the spacecraft power bus bar to the effects of electrostatic discharge

2021 ◽  
Vol 1862 (1) ◽  
pp. 012009
Author(s):  
A Drozdova ◽  
M Komnatnov
Author(s):  
Valerii Kosteletskii

The paper discusses the results of quasi-static simulation of two modal filter (MF) cascade configurations designed to attenuate an interference pulse in differential and common modes. The geometric parameters of the MF are optimized by heuristic search according to the amplitude minimization condition. The results of calculating the time responses to an ultrashort pulse (USP) and electrostatic discharge (ESD) are presented. The USP attenuation coefficient in the differential mode was 6.84 times for the horizontally placed cascades, and 6.94 times for the vertical configuration. In the common mode, the attenuation coefficient was 7.35 times for the horizontally placed cascades, and 7.57 times for the vertically placed cascades. For ESD, the attenuation coefficients were 1.51 times for the horizontally and 1.55 times for the vertically placed cascades in the differential and common modes. It was found that only the first spike is attenuated by the ESD excitation on the MF


2017 ◽  
Vol 137 (4) ◽  
pp. 229-235
Author(s):  
Yoshinori Taka ◽  
Akimasa Hirata ◽  
Kenichi Yamazaki ◽  
Osamu Fujiwara

2019 ◽  
Author(s):  
Hossein Alimohammadi ◽  
Mostafa Dalvi Esfahani ◽  
Mohammadali Lotfollahi Yaghin

In this study, the seismic behavior of the concrete shear wall considering the opening with different shapes and constant cross-section has been studied, and for this purpose, several shear walls are placed under the increasingly non-linear static analysis (Pushover). These case studies modeled in 3D Abaqus Software, and the results of the ductility coefficient, hardness, energy absorption, added resistance, the final shape, and the final resistance are compared to shear walls without opening.


Author(s):  
Rose Emergo ◽  
Steve Brockett

Abstract This paper outlines the systematic isolation of an electrostatic discharge defect on a depletion-mode FET. Topics covered are fault isolation, FIB-STEM cross-section and EDS analysis, and defect simulation. Multiple GaAs PA devices were submitted for analysis after failing different reliability stresses. Fault isolation revealed ESD damage on a DFET connected to the VMODE0 pin. Simulation of the failure showed that, most likely, the defect was caused by CDM stress. A design change of inserting a resistor between the VMODE0 pin and the DFET made the device more robust against CDM stress.


Author(s):  
Marie-Pascale Chagny ◽  
John A. Naoum

Abstract Over the years, failures induced by an electrostatic discharge (ESD) have become a major concern for semiconductor manufacturers and electronic equipment makers. The ESD events that cause destructive failures have been studied extensively [1, 2]. However, not all ESD events cause permanent damage. Some events lead to recoverable failures that disrupt system functionality only temporarily (e.g. reboot, lockup, and loss of data). These recoverable failures are not as well understood as the ones causing permanent damage and tend to be ignored in the ESD literature [3, 4]. This paper analyzes and characterizes how these recoverable failures affect computer systems. An experimental methodology is developed to characterize the sensitivity of motherboards to ESD by simulating the systemlevel ESD events induced by computer users. The manuscript presents a case study where this methodology was used to evaluate the robustness of desktop computers to ESD. The method helped isolate several weak nets contributing to the failures and identified a design improvement. The result was that the robustness of the systems improved by a factor of 2.


Author(s):  
G. Meneghesso ◽  
E. Zanoni ◽  
P. Colombo ◽  
M. Brambilla ◽  
R. Annunziata ◽  
...  

Abstract In this work, we present new results concerning electrostatic discharge (ESD) robustness of 0.6 μm CMOS structures. Devices have been tested according to both HBM and socketed CDM (sCDM) ESD test procedures. Test structures have been submitted to a complete characterization consisting in: 1) measurement of the tum-on time of the protection structures submitted to pulses with very fast rise times; 2) ESD stress test with the HBM and sCDM models; 3) failure analysis based on emission microscopy (EMMI) and Scanning Electron Microscopy (SEM).


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