Programmable Integrated Photonics

2020 ◽  
Author(s):  
José Capmany ◽  
Daniel Pérez
Keyword(s):  
Integrated Circuit ◽  
Performance Monitoring ◽  
Low Cost ◽  
Limiting Factors ◽  
External Control ◽  
Integrated Photonics ◽  
New Paradigm ◽  
Photonic Integrated Circuit ◽  
And Performance ◽  
Application Fields

Programmable Integrated Photonics (PIP) is a new paradigm that aims at designing common integrated optical hardware configurations, which by suitable programming can implement a variety of functionalities that, in turn, can be exploited as basic operations in many application fields. Programmability enables by means of external control signals both chip reconfiguration for multifunction operation as well as chip stabilization against non-ideal operation due to fluctuations in environmental conditions and fabrication errors. Programming also allows activating parts of the chip, which are not essential for the implementation of a given functionality but can be of help in reducing noise levels through the diversion of undesired reflections. After some years where the Application Specific Photonic Integrated Circuit (ASPIC) paradigm has completely dominated the field of integrated optics, there is an increasing interest in PIP justified by the surge of a number of emerging applications that are and will be calling for true flexibility, reconfigurability as well as low-cost, compact and low-power consuming devices. This book aims to provide a comprehensive introduction to this emergent field covering aspects that range from the basic aspects of technologies and building photonic component blocks to the design alternatives and principles of complex programmable photonics circuits, their limiting factors, techniques for characterization and performance monitoring/control and their salient applications both in the classical as well as in the quantum information fields. The book concentrates and focuses mainly on the distinctive features of programmable photonics as compared to more traditional ASPIC approaches.

Introduction to Programmable Integrated Photonics

2020 ◽  
pp. 1-37
Author(s):  
José Capmany ◽  
Daniel Pérez
Keyword(s):  
Integrated Circuits ◽  
Field Programmable Gate Array ◽  
Quantum Information Processing ◽  
Low Cost ◽  
Integrated Photonics ◽  
Basic Principles ◽  
Integrated Optical ◽  
Field Programmable ◽  
Application Fields ◽  
Application Specific

Programmable integrated photonics (PIP) aims at designing common integrated optical hardware configurations, which—by suitable programming—can implement a variety of functionalities that can be elaborated for basic or more complex operations in many application fields. It follows a different approach to that of application specific photonic integrated circuits (ASPICs), which have dominated during the last few decades. The interest in PIP is driven by the surge of a considerable number of emerging applications in the fields of telecommunications, quantum information processing, sensing and neurophotonics that will require flexible, reconfigurable, low-cost, compact and low-power-consuming devices, much as field programmable gate array (FPGA) devices operate in electronics. This chapter serves as a general introduction to the book and reviews the main basic principles and recent advances in PIP, including fabrication platforms, design principles, architecture choices, challenges and limitations. and provides a brief introduction to the applications of this new field.

scholarly journals Programmable multifunctional integrated nanophotonics

Nanophotonics ◽  
2018 ◽  
Vol 7 (8) ◽  
pp. 1351-1371 ◽  
Author(s):  
Daniel Pérez ◽  
Ivana Gasulla ◽  
José Capmany
Keyword(s):  
Low Power ◽  
Quantum Information Processing ◽  
Low Cost ◽  
Point Of View ◽  
Experimental Point ◽  
New Paradigm ◽  
Field Programmable ◽  
Spatial Regularity ◽  
Hardware Architectures ◽  
Application Fields

AbstractProgrammable multifunctional integrated nanophotonics (PMIN) is a new paradigm that aims at designing common integrated optical hardware configurations, which by suitable programming can implement a variety of functionalities that can be elaborated for basic or more complex operations in many application fields. The interest in PMIN is driven by the surge of a considerable number of emerging applications in the fields of telecommunications, quantum information processing, sensing and neurophotonics that will be calling for flexible, reconfigurable, low-cost, compact and low-power-consuming devices, much in the same way as how field programmable gate array (FPGA) devices operate in electronics. The success of PMIN relies on the research into suitable interconnection hardware architectures that can offer a very high spatial regularity as well as the possibility of independently setting (with a very low power consumption) the interconnection state of each connecting element. Integrated waveguide meshes provide regular and periodic geometries, formed by replicating a unit cell, which can take the form of a square, hexagon or triangle, among other configurations. Each side of the cell is formed by two integrated waveguides connected by means of a Mach-Zehnder interferometer (MZI) or a tunable directional coupler that can be operated by means of an output control signal as a crossbar switch or as a variable coupler with independent power division ratio and phase shift. In this paper, we review the recent advances reported in the field of PMIN and, especially, in those based on integrated photonic waveguide meshes, both from the theoretical as well as from the experimental point of view. We pay special attention to outlining the design principles, material platforms, synthesis algorithms and practical constraints of these structures and discuss their applicability to different fields.

Chip to chip communication through the photonic integrated circuit: A new paradigm to optical VLSI

Optik ◽  
2020 ◽  
Vol 202 ◽  
pp. 163588 ◽  
Author(s):  
I.S. Amiri ◽  
G. Palai ◽  
Jafar A. Alzubi ◽  
Soumya Ranjan Nayak
Keyword(s):  
Integrated Circuit ◽  
New Paradigm ◽  
Photonic Integrated Circuit

Design of Advanced High Performance Bus Tracer in System on Chip Using Matrix Based Compression for Low Power Applications

2020 ◽  
Vol 17 (4) ◽  
pp. 1852-1856
Author(s):  
P. Bhuvaneshwari ◽  
T. R. Jaya Chandra Lekha
Keyword(s):  
Low Power ◽  
High Performance ◽  
Performance Monitoring ◽  
Low Cost ◽  
System On Chip ◽  
Consumer Electronics ◽  
Compression Scheme ◽  
Control Signals ◽  
And Performance ◽  
On Chip

This project proposes multilayer advanced high-performance bus architecture for low power applications. The proposed AHB architecture consists of the bus arbiter and the bus tracer (A.R.M.A., 1999. Specification (Rev 2.0) ARM IHI0011A). The bus arbiter, which is self motivated selects the input packet based on the control signals of the incoming packet. So that arbitration leads to a maximum performance. The On-Chip bus is an important system-on-chip infrastructure that connects major hardware components. Monitoring the on-chip bus signals is crucial to the SoC debugging and performance analysis/optimization (Gu, R.T., et al., 2007. A Low Cost Tile-Based 3D Graphics Full Pipeline with Real-Time Performance Monitoring Support for OpenGL ES in Consumer Electronics. 2007 IEEE International Symposium on Consumer Electronics, June; IEEE. pp.1–6). But, such signals are difficult to observe since they are deeply embedded in a SoC and there are often no sufficient I/O pins to access these signals. Therefore, a straightforward approach is to embed a bus tracer in SoC to capture the bus signal trace and store the trace in on-chip storage such as the trace memory which could then be off loaded to outside world for analysis. The bus tracer is capable of capturing the bus trace with different resolutions, all with efficient built in compression mechanisms such as dictionary based compression scheme for address and control signals and differential compression scheme for data. To improve the compression ratio matrix based compression which is lossless compression is used instead of differential compression. This system is designed using Verilog HDL, simulated using Modelsim and synthesized using Xilinx software.

scholarly journals Integrated Ammonia Sensor Using a Telecom Photonic Integrated Circuit and a Hollow Core Fiber

Photonics ◽  
2020 ◽  
Vol 7 (4) ◽  
pp. 93
Author(s):  
Andreas Hänsel ◽  
Abubakar Isa Adamu ◽  
Christos Markos ◽  
Anders Feilberg ◽  
Ole Bang ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Gas Sensing ◽  
Low Cost ◽  
Tunable Laser ◽  
Single Mode ◽  
Laser Source ◽  
Hollow Core ◽  
Ammonia Sensor ◽  
Photonic Integrated Circuit ◽  
Core Fiber

We present a fully integrated optical ammonia sensor, based on a photonic integrated circuit (PIC) with a tunable laser source and a hollow-core fiber (HCF) as gas interaction cell. The PIC also contains a photodetector that can be used to record the absorption signal with the same device. The sensor targets an ammonia absorption line at 1522.45 nm, which can be reached with indium phosphide-based telecom compatible PICs. A 1.65-m long HCF is connected on both ends to a single-mode fiber (SMF) with a mechanical splice that allows filling and purging of the fiber within a few minutes. We show the detection of a 5% ammonia gas concentration, as a proof of principle of our sensor and we show the potential to even detect much lower concentrations. This work paves the way towards a low-cost, integrated and portable gas sensor with potential applications in environmental gas sensing.

Fabrication of Integrated Magneto-Optic Isolator

2004 ◽  
Vol 834 ◽  
Author(s):  
Sang-Yeob Sung ◽  
Xiaoyuan Qi ◽  
John Reinke ◽  
Samir K. Mondal ◽  
Sun Sook Lee ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Rf Sputtering ◽  
Magnetic Films ◽  
Light Sources ◽  
Photonic Integrated Circuit ◽  
Garnet Films ◽  
Optical Applications ◽  
And Performance ◽  
Optical Isolators ◽  
Magneto Optic

ABSTRACTIn optical applications, especially in optical communications, protecting light sources from harmful reflected energy is very important. With magneto-optic isolators, these light sources can be protected to extend their lifetimes and performance by blocking back-reflected light. The active element in these optical isolators is a magneto-optical garnet. However, garnet is difficult to integrate with semiconductors due to the high thermal budget usually required to obtain the garnet crystal structure. For example, current isolator garnets cannot be integrated monolithically into a photonic integrated circuit due to the growth process, liquid phase epitaxy, which requires growth temperatures of >900 °C and also garnet substrates. In this work, magneto-optical garnets were grown monolithically by low-temperature reactive RF sputtering, followed by an ultra-short (<15 sec) anneal. The refractive indices of the resulting garnets were measured using Fourier transform infrared (FTIR) spectroscopy. Various rib waveguides were fabricated by both wet etching and reactive ion etching (RIE). The width of the waveguides varied from 2 to 12 μm and the heights were varied from 0.5 to 1.0 μm. Sm-Co thin films were used for integrated biasing magnets. They were deposited on top of claddings of both magnesium oxide and yttrium oxide, all using the same sputtering system that was used to deposit the garnet films. These magnetic films had high enough remanent fields to saturate the garnet waveguides, and they had coercivities of 700 Oe. The Faraday rotations and waveguide losses of the subsequent isolators were measured to be 10 degrees and 0.1 dB/μm at 632 nm, respectively. Although this prototype is promising, optimization of the device designs is ongoing. In summary, this work succeeded in providing the first comprehensive report on etching YIG by RIE, in developing all of the steps required for integrating isolators on non-garnet substrates, and in proving the feasibility of these isolators.

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