Deuterium isotope effect for AC and DC hot-carrier degradation of MOS transistors: a comparison study

2001 ◽  
Vol 48 (4) ◽  
pp. 813-815
Author(s):  
Zhi Chen ◽  
Kangguo Cheng ◽  
Jinju Lee ◽  
J.W. Lyding ◽  
K. Hess ◽  
...  
1988 ◽  
Vol 49 (C4) ◽  
pp. C4-651-C4-655 ◽  
Author(s):  
R. BELLENS ◽  
P. HEREMANS ◽  
G. GROESENEKEN ◽  
H. E. MAES

1998 ◽  
Vol 510 ◽  
Author(s):  
J. Lee ◽  
Z. Chen ◽  
K. Hess ◽  
J.W. Lyding

AbstractIt has been found that deuterium (D) instead of hydrogen (H) can be used to greatly strengthen the resistance of metal oxide semiconductor (MOS) transistors against hot carrier induced degradation. We have applied the new deuterium sintering process to CMOS technology and have obtained significantly improved hot carrier reliability resulting from the isotope effect. We will present a summary of these lifetime improvements from five different transistor structures of five different manufacturers, as well as the physical and electrical characterizations of the deuterium sintering process.


2002 ◽  
Vol 716 ◽  
Author(s):  
Nihar Ranjan Mohapatra ◽  
Souvik Mahapatra ◽  
V. Ramgopal Rao

AbstractThis paper analyzes in detail the substrate enhanced gate current injection mechanism and the resulting hot-carrier degradation in n-channel MOS transistors and compares the results with conventional channel hot carrier injection mechanism. The degradation mechanism is studied for different values of substrate voltage over a wide range of channel length and oxide thickness. Stress and charge pumping measurements are carried out to study the degradation under identical bias (gate, drain, substrate) and gate current condition. The influence of device dimensions on the gate injection efficiency and hot carrier degradation is also studied. Results show that the degradation under negative substrate voltage operation is strongly dependent on the transverse electric field and spread of the interface trap profile. The possible mechanism responsible for such trends is discussed. It is also found that, under identical gate current (programming time in flash memory cells), the degradation is less for higher negative substrate bias, which is helpful in realizing fast and reliable flash memories.


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