A sub-1 volt CMOS bandgap reference with high power supply rejection

The reference is an important part in the accelerometer system. With the development of science and technology, the request of the performance of accelerometers is increasingly higher and the precision of reference directly affects the performance of accelerometers. Therefore, a reference voltage applicable to accelerometers is presented based on the analysis of basic principles of conventional bandgap reference (BGR) in this paper. A high-order curvature compensation technique, which uses a temperature dependent resistor ratio generated by a high poly resistor and a nwell resistor, effectively serves to reduce temperature coefficient of proposed reference voltage circuit and to a large extent improve its performance. To achieve a high power supply rejection ratio (PSRR) over a broad frequency range, a pre-regulator is introduced to remain the supply voltage of the core circuit of BGR relatively independent of the global supply voltage. The proposed circuitry is designed in standard 2.0μm CMOS process. The simulated result shows that the average temperature coefficient is less than 2ppm/°C in the temperature range from -40 to 120°C. The improvement on temperature coefficient (TC) is about 10 times reduction compared to the conventional approach. And the PSR at DC frequency and 1kHz achieves -107 and -71dB respectively at 9.0V supply voltage.

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Design of a CMOS Bandgap Reference with Low Temperature Coefficient and High Power Supply Rejection Performance

International Journal of VLSI Design & Communication Systems ◽

10.5121/vlsic.2011.2312 ◽

2011 ◽

Vol 2 (3) ◽

pp. 139-150 ◽

Cited By ~ 4

Author(s):

Abhisek Dey ◽

Tarun Kanti Bhattacharyya

Keyword(s):

Low Temperature ◽

Temperature Coefficient ◽

High Power ◽

Power Supply ◽

Bandgap Reference ◽

Supply Rejection

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An improved bandgap reference with high power supply rejection

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) ◽

10.1109/iscas.2002.1010833 ◽

2003 ◽

Cited By ~ 20

Author(s):

Siew Kuok Hoon ◽

Jun Chen ◽

F. Maloberti

Keyword(s):

High Power ◽

Power Supply ◽

Bandgap Reference ◽

Supply Rejection

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An Improved Bandgap Reference with Curvature-Compensated and High Power Supply Rejection

Journal of Circuits System and Computers ◽

10.1142/s0218126616501474 ◽

2016 ◽

Vol 25 (11) ◽

pp. 1650147 ◽

Cited By ~ 1

Author(s):

Hongbing Wu ◽

Hongxia Liu

Keyword(s):

High Power ◽

Power Supply ◽

Low Frequency ◽

Bandgap Reference ◽

Rejection Ratio ◽

Power Supply Rejection Ratio ◽

Resistor String ◽

Typical Condition ◽

Active Design ◽

Supply Rejection

This paper presents a bandgap reference (BGR) with the characteristics of curvature-compensation and high power supply rejection ratio (PSRR). To achieve a better performance, the base current of BJT is injected to a small segment of resistor string to flatten the temperature variation, and a pre-regulator of the power supply is implemented to improve the PSRR. The circuits, designed in 0.18[Formula: see text][Formula: see text]m BCD technology, exhibit an average voltage of 1.212[Formula: see text]V with temperature coefficient of 2.0[Formula: see text]ppm/[Formula: see text] in the range from [Formula: see text] to 110[Formula: see text] at typical condition, and a power supply rejection ratio of [Formula: see text][Formula: see text]dB at low frequency. After 4-bit trimming, Monte Carlo simulation results show that the proposed design gets an accuracy of 0.29%, with a variation of [Formula: see text][Formula: see text]mV. The active design area is 160[Formula: see text][Formula: see text]m, and the power supply current is about 8.2[Formula: see text][Formula: see text]A.

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A LOW DROPOUT REGULATOR WITH LOW QUIESCENT CURRENT AND HIGH POWER SUPPLY REJECTION OVER WIDE RANGE OF FREQUENCY FOR SOC

Journal of Circuits System and Computers ◽

10.1142/s0218126611007037 ◽

2011 ◽

Vol 20 (01) ◽

pp. 1-13 ◽

Cited By ~ 3

Author(s):

CHENCHANG ZHAN ◽

WING-HUNG KI

Keyword(s):

High Power ◽

Power Supply ◽

Cmos Process ◽

High Loop ◽

Wide Range ◽

Quiescent Current ◽

Low Dropout Regulator ◽

Output Capacitor ◽

Large Output ◽

Supply Rejection

A CMOS low quiescent current low dropout regulator (LDR) with high power supply rejection (PSR) and without large output capacitor is proposed for system-on-chip (SoC) power management applications. By cascoding a power NMOS with the PMOS pass transistor, high PSR over a wide frequency range is achieved. The gate-drive of the cascode NMOS is controlled by an auxiliary LDR that draws only 1 μA from a small charge pump, thus helping in reducing the quiescent current. Adaptive biasing is employed for the multi-stage error amplifier of the core LDR to achieve high loop gain hence high PSR at low frequency, low quiescent current at light load and high bandwidth at heavy load. A prototype of the proposed high-PSR LDR is fabricated using a standard 0.35 μm CMOS process, occupying an active area of 0.066 mm2. The lowest supply voltage is 1.6 V and the preset output voltage is 1.2 V. The maximum load current is 10 mA. The measured worst-case PSR at full load without using large output capacitor is -22.7 dB up to 60 MHz. The line and load regulations are 0.25 mV/V and 0.32 mV/mA, respectively.

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