A low power 77 K nano-memory with single electron nano-crystal storage

Author(s):  
S. Tiwari ◽  
F. Rana ◽  
Wei Chen ◽  
K. Chan ◽  
H. Hanafi
2021 ◽  
Author(s):  
Matthew Al Disi ◽  
Alireza Mohammad Zaki ◽  
Qinwen Fan ◽  
Stoyan Nihtianov

2021 ◽  
Vol 24 (3) ◽  
pp. 277-287
Author(s):  
A.K. Biswas ◽  

In engineering and science, high operating speed, low power consumption, and high integration density equipment are financially indispensable. Single electron device (SED) is one such equipment. SEDs are capable of controlling the transport of only one electron through the tunneling transistor. It is single electron that is sufficient to store information in SED. Power consumed in the single electron circuit is very low in comparison with CMOS circuits. The processing speed of single electron transistor (SET) based device will be nearly close to electronic speed. SET attracts the researchers, scientists or technologists to design and implement large scale circuits for the sake of the consumption of ultra-low power and its small size. All the incidences for the case of a SET-based circuit happen when only a single electron tunnels through the transistors under the proper applied bias voltage and a small gate voltage or multiple gate voltages. For implementing a single electron transistor based voltmeter circuit, SET would be the best candidate to fulfil the requirements of it. Ultra-low noise is generated during tunneling SEDs. A D Flip-Flop is implemented and based on this, two kinds of registers like sequence register and сode register are made.


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