scholarly journals Measuring of an unknown voltage by using single electron transistor based voltmeter

2021 ◽  
Vol 24 (3) ◽  
pp. 277-287
Author(s):  
A.K. Biswas ◽  
Keyword(s):  
Low Power ◽  
Large Scale ◽  
Low Noise ◽  
Single Electron ◽  
Single Electron Transistor ◽  
Flip Flop ◽  
Ultra Low Power ◽  
Integration Density ◽  
Single Electron Device ◽  
Ultra Low Noise

In engineering and science, high operating speed, low power consumption, and high integration density equipment are financially indispensable. Single electron device (SED) is one such equipment. SEDs are capable of controlling the transport of only one electron through the tunneling transistor. It is single electron that is sufficient to store information in SED. Power consumed in the single electron circuit is very low in comparison with CMOS circuits. The processing speed of single electron transistor (SET) based device will be nearly close to electronic speed. SET attracts the researchers, scientists or technologists to design and implement large scale circuits for the sake of the consumption of ultra-low power and its small size. All the incidences for the case of a SET-based circuit happen when only a single electron tunnels through the transistors under the proper applied bias voltage and a small gate voltage or multiple gate voltages. For implementing a single electron transistor based voltmeter circuit, SET would be the best candidate to fulfil the requirements of it. Ultra-low noise is generated during tunneling SEDs. A D Flip-Flop is implemented and based on this, two kinds of registers like sequence register and сode register are made.

scholarly journals Finding out square root of an integer number using Single Electron Transistor

2021 ◽  
pp. 96-110
Author(s):  
Dr. Anup Kumar Biswas
Keyword(s):  
Power Consumption ◽  
Gate Voltage ◽  
Large Scale ◽  
Complementary Metal Oxide Semiconductor ◽  
Single Electron ◽  
Oxide Semiconductor ◽  
Integer Number ◽  
Single Electron Transistor ◽  
Square Root ◽  
Ultra Low Power

The single-electron transistor (SET) attracts the researchers, scientists or technologists to design and construct large scale circuits for the sake of the consumption of ultra-low power and its small size. All the incidences in a SET-based circuit happen when only a single electron tunnels through the transistors under the proper applied bias voltage and a small gate voltage or multiple gate voltages. The oscillatory conduction as the function of the variable-multiple /single gate voltage is exhibited by SET. This uncommon characteristic provides the ability of executing the functions of AND, OR, XOR, Inverter and some combinational circuits like multiplexer, subtractor etc. For implementing a square root circuit, SET would be a best candidate to fulfil the requirements. The processing speed of SET based devices will be nearly close to electronic speed. Noise during processing gets ultra-low when the circuits is built with SETs. The square root circuit is presented here for sixteen bit input numbers. The input bit numbers can be increased with the increasing of the depth of the pattern very easily. And this will provide us the greater accuracy about the squared root value. Power consumption in the single electron circuit is low irrespective of bipolar junction transistor (BJT) or Complementary Metal Oxide Semiconductor (CMOS) circuits. Reducing the numbers of nodes, the power consumption is reduced.

scholarly journals A Low Power Flash ADC using Single-Electron Transistor

2019 ◽  
Vol 8 (9) ◽  
pp. 568-572
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Single Electron ◽  
Single Electron Transistor ◽  
Ultra Low Power ◽  
Flash Adc ◽  
Terminal Set ◽  
Small Quantum ◽  
Voltage Swing ◽  
Priority Encoder

This paper proposes an analog-digital converter (ADC) using Single-electron transistor (SET).Single Electron Transistor is Nanodevice having a small quantum dot or island instead of the channel that works on the principle of Coulomb blockadewhich allows one electron tunnelingat a time from source to drain terminal. SET operates at low voltage and consumes lesspower. The proposed Flash ADC consists of SET based priority encoder and comparator circuits. The proposed design offers large input/output voltage swing, ultra-low power, compact circuit block for ADC compared to SET/CMOS hybrid amplifier-based ADC. In this paper, we have designed a 4-bit and 8bitFlash ADC using SET operating at room temperature and the performance estimationwas performed by using the CADENCE VIRTUOSO simulator

scholarly journals A 219-µW ultra-low power low-noise amplifier for IEEE 802.15.4 based battery powered, portable, wearable IoT applications

2021 ◽  
Vol 3 (4) ◽  
Author(s):  
S. Chrisben Gladson ◽  
Adith Hari Narayana ◽  
V. Thenmozhi ◽  
M. Bhaskar
Keyword(s):  
Low Power ◽  
Ieee 802.15.4 ◽  
Low Voltage ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Cmos Process ◽  
Process Technology ◽  
Ultra Low Power ◽  
Power Mode ◽  
Noise Amplifier

AbstractDue to the increased processing data rates, which is required in applications such as fifth-generation (5G) wireless networks, the battery power will discharge rapidly. Hence, there is a need for the design of novel circuit topologies to cater the demand of ultra-low voltage and low power operation. In this paper, a low-noise amplifier (LNA) operating at ultra-low voltage is proposed to address the demands of battery-powered communication devices. The LNA dual shunt peaking and has two modes of operation. In low-power mode (Mode-I), the LNA achieves a high gain ($$S21$$ S 21 ) of 18.87 dB, minimum noise figure ($${NF}_{min.}$$ NF m i n . ) of 2.5 dB in the − 3 dB frequency range of 2.3–2.9 GHz, and third-order intercept point (IIP3) of − 7.9dBm when operating at 0.6 V supply. In high-power mode (Mode-II), the achieved gain, NF, and IIP3 are 21.36 dB, 2.3 dB, and 13.78dBm respectively when operating at 1 V supply. The proposed LNA is implemented in UMC 180 nm CMOS process technology with a core area of $$0.40{\mathrm{ mm}}^{2}$$ 0.40 mm 2 and the post-layout validation is performed using Cadence SpectreRF circuit simulator.

High-Count Rate, Low Power and Low Noise Single Electron Readout ASIC in 65nm CMOS Technology

2021 ◽  
Author(s):  
Matthew Al Disi ◽  
Alireza Mohammad Zaki ◽  
Qinwen Fan ◽  
Stoyan Nihtianov
Keyword(s):  
Low Power ◽  
Count Rate ◽  
Cmos Technology ◽  
Low Noise ◽  
Single Electron ◽  
High Count ◽  
High Count Rate

Ultra Low-power, Low-energy Static Single-phase Clocked Flip-flop

2021 ◽  
Author(s):  
Yugal Maheshwari ◽  
Kleber Stangherlin ◽  
Derek Wright ◽  
Manoj Sachdev
Keyword(s):  
Low Power ◽  
Single Phase ◽  
Low Energy ◽  
Flip Flop ◽  
Ultra Low Power

scholarly journals Ultra-Low Power 18-Transistor Fully Static Contention-Free Single-Phase Clocked Flip-Flop in 65-nm CMOS

2019 ◽  
Vol 54 (2) ◽  
pp. 550-559 ◽  
Author(s):  
Yunpeng Cai ◽  
Anand Savanth ◽  
Pranay Prabhat ◽  
James Myers ◽  
Alex S. Weddell ◽  
...  
Keyword(s):  
Low Power ◽  
Single Phase ◽  
Flip Flop ◽  
Ultra Low Power

scholarly journals Ultra-Low Power CMOS Readout for Resonant MEMS Strain Sensors

Proceedings ◽  
2018 ◽  
Vol 2 (13) ◽  
pp. 973
Author(s):  
Marco Crescentini ◽  
Cinzia Tamburini ◽  
Luca Belsito ◽  
Aldo Romani ◽  
Alberto Roncaglia ◽  
...  
Keyword(s):  
Low Power ◽  
Power Supply ◽  
First Generation ◽  
Negative Resistance ◽  
Low Noise ◽  
Strain Sensors ◽  
Current Conveyors ◽  
Ultra Low Power ◽  
Active Elements ◽  
Low Power Cmos

This paper presents an ultra-low power, silicon-integrated readout for resonant MEMS strain sensors. The analogue readout implements a negative-resistance amplifier based on first-generation current conveyors (CCI) that, thanks to the reduced number of active elements, targets both low-power and low-noise. A prototype of the circuit was implemented in a 0.18-µm technology occupying less than 0.4 mm2 and consuming only 9 µA from the 1.8-V power supply. The prototype was earliest tested by connecting it to a resonant MEMS strain resonator.

Ultra-low power subthreshold flip-flop design

2009 ◽  
Author(s):  
Sagi Fisher ◽  
Adam Teman ◽  
Dmitry Vaysman ◽  
Alexander Gertsman ◽  
Orly Yadid-Pecht ◽  
...  
Keyword(s):  
Low Power ◽  
Flip Flop ◽  
Ultra Low Power
Sign in / Sign up

Export Citation Format

Share Document