Optimized Design For Test Techniques Applied to Embedded Mixed Mode Macros

1992 ◽  
Author(s):  
S. Allott ◽  
J. Raczkowycz
Keyword(s):  
Mixed Mode ◽  
Design For Test ◽  
Optimized Design

“To Corrupt a Man in the Midst of a Verse”: Ben Jonson and the Prose of the World

2017 ◽  
Vol 24 (1) ◽  
pp. 46-72
Author(s):  
Jacob Tootalian
Keyword(s):  
Mixed Mode ◽  
Ben Jonson ◽  
Digital Analysis ◽  
Interactive Engagement ◽  
Sentence Level ◽  
Linguistic Patterns ◽  
The World ◽  
Selection Of ◽  
Bartholomew Fair

Ben Jonson's early plays show a marked interest in prose as a counterpoint to the blank verse norm of the Renaissance stage. This essay presents a digital analysis of Jonson's early mixed-mode plays and his two later full-prose comedies. It examines this selection of the Jonsonian corpus using DocuScope, a piece of software that catalogs sentence-level features of texts according to a series of rhetorical categories, highlighting the distinctive linguistic patterns associated with Jonson's verse and prose. Verse tends to employ abstract, morally and emotionally charged language, while prose is more often characterized by expressions that are socially explicit, interrogative, and interactive. In the satirical economy of these plays, Jonson's characters usually adopt verse when they articulate censorious judgements, descending into prose when they wade into the intractable banter of the vicious world. Surprisingly, the prosaic signature that Jonson fashioned in his earlier drama persisted in the two later full-prose comedies. The essay presents readings of Every Man Out of his Humour and Bartholomew Fair, illustrating how the tension between verse and prose that motivated the satirical dynamics of the mixed-mode plays was released in the full-prose comedies. Jonson's final experiments with theatrical prose dramatize the exhaustion of the satirical impulse by submerging his characters almost entirely in the prosaic world of interactive engagement.

Mixed-mode Endings in Chopin’s Nocturnes

2016 ◽  
Vol 23 (2) ◽  
pp. 45-64
Author(s):  
Heewon Chung
Keyword(s):  
Mixed Mode

Realization of mixed-mode universal biquad based on CFOAs

2014 ◽  
Author(s):  
Junru Zhang ◽  
Lixue Wang ◽  
Chunyue Wang
Keyword(s):  
Mixed Mode

Case Study: Combined Dynamic Laser Stimulation and Static Emission Microscopy Techniques Applied to Scan Test Failure on Mixed Mode Device

2012 ◽  
Author(s):  
Magdalena Sienkiewicz ◽  
Philippe Rousseille
Keyword(s):  
Mixed Mode ◽  
Laser Stimulation ◽  
Scan Test ◽  
Silicon Bulk ◽  
Defect Localization ◽  
Emission Microscopy ◽  
Microscopy Techniques ◽  
Test Failure

Abstract This paper presents a case study on scan test reject in a mixed mode IC. It focuses on the smart use of combined mature FA techniques, such as Soft Defect Localization (SDL) and emission microscopy (EMMI), to localize a random scan test anomaly at the silicon bulk level.

Combine Micro-Probing and OBIRCH to Catch Non-Recognizable Fault in RF and Mixed-Mode Integrated Circuits

2007 ◽  
Author(s):  
Cha-Ming Shen ◽  
Yen-Long Chang ◽  
Lian-Fon Wen ◽  
Tan-Chen Chuang ◽  
Shi-Chen Lin ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Radio Frequency ◽  
Failure Analysis ◽  
Case Studies ◽  
Mixed Mode ◽  
Failure Mechanisms ◽  
Deep Submicron ◽  
Digital Logic ◽  
Successful Approach ◽  
Cmos Processes

Abstract Highly-integrated radio frequency and mixed-mode devices that are manufactured in deep-submicron or more advanced CMOS processes are becoming more complex to analyze. The increased complexity presents us with many eccentric failure mechanisms that are uniquely different from traditional failure mechanisms found during failure analysis on digital logic applications. This paper presents a novel methodology to overcome the difficulties and discusses two case studies which demonstrate the application of the methodology. Through the case studies, the methodology was proven to be a successful approach. It is also proved how this methodology would work for such non-recognizable failures.

Investigation of High Frequency Failures on a 0.35μm CMOS IC

1999 ◽  
Author(s):  
Alan Kennen ◽  
John F. Guravage ◽  
Lauren Foster ◽  
John Kornblum
Keyword(s):  
Failure Analysis ◽  
Failure Mechanism ◽  
Integrated Circuit ◽  
Metal Layer ◽  
Ion Beam ◽  
Stress Test ◽  
Design For Test ◽  
Interface Failure ◽  
Serial Interface ◽  
High Impedance

Abstract Rapidly changing technology highlights the necessity of developing new failure analysis methodologies. This paper will discuss the combination of two techniques, Design for Test (DFT) and Focused Ion Beam (FIB) analysis, as a means for successfully isolating and identifying a series of high impedance failure sites in a 0.35 μm CMOS design. Although DFT was designed for production testing, the failure mechanism discussed in this paper may not have been isolated without this technique. The device of interest is a mixed signal integrated circuit that provides a digital up-convert function and quadrature modulation. The majority of the circuit functions are digital and as such the majority of the die area is digital. For this analysis, Built In Self Test (BIST) circuitry, an evaluation board for bench testing and FIB techniques were used to successfully identify an unusual failure mechanism. Samples were subjected to Highly Accelerated Stress Test (HAST) as part of the device qualification effort. Post-HAST electrical testing at 200MHz indicated that two units were non-functional. Several different functional blocks on the chip failed electrical testing. One part of the circuitry that failed was the serial interface. The failure analysis team decided to look at the serial interface failure mode first because of the simplicity of the test. After thorough analysis the FA team discovered increasing the data setup time at the serial port input allowed the device to work properly. SEM and FIB techniques were performed which identified a high impedance connection between a metal layer and the underlying via layer. The circuit was modified using a FIB edit, after which all vectors were read back correctly, without the additional set-up time.

Sign in / Sign up

Export Citation Format

Share Document