Double Gate Tunnel FET with ultrathin silicon body and high-k gate dielectric

Author(s):  
Kathy Boucart ◽  
Adrian Ionescu
2007 ◽  
Vol 51 (11-12) ◽  
pp. 1500-1507 ◽  
Author(s):  
Kathy Boucart ◽  
Adrian Mihai Ionescu

2006 ◽  
Vol 958 ◽  
Author(s):  
Mark S. Lundstrom ◽  
Kurtis D. Cantley ◽  
Himadri S. Pal

ABSTRACTWe analyze a modern-day 65nm MOSFET technology to determine its electrical characteristics and intrinsic ballistic efficiency. Using that information, we then predict the performance of similar devices comprised of different materials, such as high-k gate dielectrics and III-V channel materials. The effects of series resistance are considered. Comparisons are made between the performance of these hypothetical devices and future generations of devices from the ITRS roadmap, including double-gate MOSFETs. We conclude that a Si channel device with a high-k gate dielectric and metal gate will outperform III-V channel materials for conventional CMOS applications, but will still not suffice in achieving long-term ITRS goals.


2002 ◽  
Vol 303 (1) ◽  
pp. 54-63 ◽  
Author(s):  
P.S. Lysaght ◽  
P.J. Chen ◽  
R. Bergmann ◽  
T. Messina ◽  
R.W. Murto ◽  
...  

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