Test pattern selection to optimize delay test quality with a limited size of test set

2010 15th IEEE European Test Symposium ◽

10.1109/etsym.2010.5512733 ◽

2010 ◽

Author(s):

Michiko Inoue ◽

Akira Taketani ◽

Tomokazu Yoneda ◽

Hiroshi Iwata ◽

Hideo Fujiwara

Keyword(s):

Test Pattern ◽

Pattern Selection ◽

Test Quality ◽

Test Set ◽

Limited Size ◽

Test Pattern Selection

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Test Pattern Selection for Defect-Aware Test

2011 Asian Test Symposium ◽

10.1109/ats.2011.24 ◽

2011 ◽

Author(s):

Yoshinobu Higami ◽

Hiroshi Furutani ◽

Takao Sakai ◽

Shuichi Kameyama ◽

Hiroshi Takahashi

Keyword(s):

Test Pattern ◽

Pattern Selection ◽

Selection For ◽

Test Pattern Selection

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Interconnect-Aware and Layout-Oriented Test-Pattern Selection for Small-Delay Defects

2008 IEEE International Test Conference ◽

10.1109/test.2008.4700627 ◽

2008 ◽

Author(s):

M. Yilmaz ◽

K. Chakrabarty ◽

M. Tehranipoor

Keyword(s):

Test Pattern ◽

Pattern Selection ◽

Small Delay Defects ◽

Small Delay ◽

Selection For ◽

Delay Defects ◽

Test Pattern Selection

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An optimal test pattern selection method to improve the defect coverage

IEEE International Conference on Test, 2005. ◽

10.1109/test.2005.1584039 ◽

2006 ◽

Author(s):

Yuxin Tian ◽

M.R. Grimailay ◽

Weiping Shi ◽

M.R. Mercer

Keyword(s):

Test Pattern ◽

Selection Method ◽

Pattern Selection ◽

Defect Coverage ◽

Optimal Test ◽

Test Pattern Selection

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Physically-awareN-detect test pattern selection

2008 Design, Automation and Test in Europe ◽

10.1145/1403375.1403528 ◽

2008 ◽

Author(s):

Yen-Tzu Lin ◽

Osei Poku ◽

Naresh K. Bhatti ◽

R. D. (Shawn) Blanton

Keyword(s):

Test Pattern ◽

Pattern Selection ◽

Test Pattern Selection

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Test Pattern Selection and Compaction for Sequential Circuits in an HDL Environment

2010 19th IEEE Asian Test Symposium ◽

10.1109/ats.2010.85 ◽

2010 ◽

Author(s):

M. H. Haghbayan ◽

S. Karamati ◽

F. Javaheri ◽

Z. Navabi

Keyword(s):

Test Pattern ◽

Sequential Circuits ◽

Pattern Selection ◽

Test Pattern Selection

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A test pattern selection method for dynamic burn-in of logic circuits based on ATPG technique

2013 IEEE 10th International Conference on ASIC ◽

10.1109/asicon.2013.6811958 ◽

2013 ◽

Author(s):

Xuan Yang ◽

Xiaole Cui ◽

Chao Wang ◽

Chung-Len Lee

Keyword(s):

Test Pattern ◽

Selection Method ◽

Logic Circuits ◽

Pattern Selection ◽

Test Pattern Selection

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A test pattern selection method for a joint bounded-distance and encoding-based decoding algorithm of binary codes [Transactions Letters

IEEE Transactions on Communications ◽

10.1109/tcomm.2010.06.0801652 ◽

2010 ◽

Vol 58 (6) ◽

pp. 1601-1604

Author(s):

Hitoshi Tokushige ◽

Marc C. Foss ◽

Tadao Kasami

Keyword(s):

Test Pattern ◽

Selection Method ◽

Binary Codes ◽

Pattern Selection ◽

Decoding Algorithm ◽

Bounded Distance ◽

Test Pattern Selection

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On Achieving Maximal Chain Diagnosis Resolution through Test Pattern Selection

2016 IEEE 25th Asian Test Symposium (ATS) ◽

10.1109/ats.2016.22 ◽

2016 ◽

Author(s):

Xijiang Lin ◽

Sudhakar M. Reddy ◽

Wu-Tung Cheng

Keyword(s):

Test Pattern ◽

Maximal Chain ◽

Pattern Selection ◽

Test Pattern Selection

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On High-Quality Test Pattern Selection and Manipulation

2011 Sixteenth IEEE European Test Symposium ◽

10.1109/ets.2011.49 ◽

2011 ◽

Author(s):

Feng Yuan ◽

Xiao Liu ◽

Qiang Xu

Keyword(s):

Test Pattern ◽

Pattern Selection ◽

Quality Test ◽

High Quality ◽

Test Pattern Selection

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Test Pattern Selection and Customization Targeting Reduced Dynamic and Leakage Power Consumption

2009 Asian Test Symposium ◽

10.1109/ats.2009.35 ◽

2009 ◽

Author(s):

Subhadip Kundu ◽

Krishna Kumar S. ◽

Santanu Chattopadhyay

Keyword(s):

Power Consumption ◽

Test Pattern ◽

Leakage Power ◽

Pattern Selection ◽

Test Pattern Selection ◽

Reduced Dynamic

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