A 0.5-14.5GHz Frequency Divider for Wide Band Fractional-N Frequency Synthesizers

Author(s):  
Ziying Wu ◽  
Zhi-Jian Chen ◽  
Changjian Zhou ◽  
Riyan Wang ◽  
Bin Li ◽  
...  
2021 ◽  
Author(s):  
Dominic DiClemente

This thesis deals with current-mode techniques for ultra-wide band applications. An overview of ultra-wide band (UWB) wireless communications is presented. Two standards for UWB data communications, namely direct-synthesis UWB (DS-UWB) and Multi-band orthogonal frequency division multiplexing (MB-OFDM) UWB are presented. MB-OFDM UWB devices must hop among 14 UWB channels within 9.5 ns, imposing stringent constraints on design of frequency synthesizers. A review of the state-of-the-art frequency synthesizers for MB-OFDM UWB applications is provided. Current-mode phase-locked loops with active inductors and active transformers employed in both loop filters and voltage-controlled oscillators are proposed and their performance in analyzed. Current-mode phase-locked loops decouple the PLL dynamic range from the scaling down of the supply voltage. An active-inductor VCO with both coarse and fine frequency adjustment, a hybrid VCO with a step-down passive transformer loaded with an active inductor, and a hybrid VCO with a step-down passive transformer with a varactor are proposed and their performances are analyzed. These VCOs obtain wide frequency tuning ranges without relying on switched back networks. To meet the timing constraint of UWB frequency synthesizers, Current-mode techniques are further developed for UWB frequency synthesizers. An active inductor with a bank of switched capacitors is proposed to provide fast locking. The bank of switched capacitors eliminates the frequency acquisition locking time of the frequency synthesizer, allowing 9.5 ns phase locking time. The proposed current-mode phase-locked loops, active-inductors oscillators and hybrid oscillators were designed and implemented in TSMC-0.18 μm and IBM-0.13 μm CMOS technologies.


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