Industry's First Recessed Gate Transistor Technology for Sense Amplifer Circuit in DRAM: Phenomena of Randomly Threshold Voltage High Flying and Subthreshold Swing Degradation

Author(s):  
Dongyean Oh ◽  
Heejung Yang ◽  
Seonyong Cha ◽  
Seungchul Lee ◽  
Sungkye Park ◽  
...  
2021 ◽  
Vol 14 (1) ◽  
pp. 014003
Author(s):  
Shahab Mollah ◽  
Kamal Hussain ◽  
Abdullah Mamun ◽  
Mikhail Gaevski ◽  
Grigory Simin ◽  
...  

2012 ◽  
Vol 717-720 ◽  
pp. 1059-1064 ◽  
Author(s):  
Sei Hyung Ryu ◽  
Lin Cheng ◽  
Sarit Dhar ◽  
Craig Capell ◽  
Charlotte Jonas ◽  
...  

We present our recent developments in 4H-SiC power DMOSFETs. 4H-SiC DMOSFETs with a room temperature specific on-resistance of 3.7 mΩ-cm2 with a gate bias of 20 V, and an avalanche voltage of 1550 V with gate shorted to source, was demonstrated. A threshold voltage of 3.5 V was extracted from the power DMOSFET, and a subthreshold swing of 200 mV/dec was measured. The device was successfully scaled to an active area of 0.4 cm2, and the resulting device showed a drain current of 377 A at a forward voltage drop of 3.8 V at 25oC.


2019 ◽  
Vol 14 (1) ◽  
pp. 1-6
Author(s):  
Alberto Vinícius Oliveira ◽  
Guilherme Vieira Gonçalves ◽  
Paula Ghedini Der Agopian ◽  
João Antonio Martino ◽  
Jérôme Mitard ◽  
...  

The implementation of a barrier potential layer underneath the channel region, well known as Ground Plane (GP) implantation, and its influence on the performance of relaxed germanium pFinFET devices is investigated in this manuscript. This study aims to explain the fin width dependence of the threshold voltage from experimental data and evaluates the ground plane doping concentration and its depth influence on relaxed p-type channel germanium FinFET parameters, as threshold voltage, transconductance and subthreshold swing, through Technology Computer-Aided Design (TCAD) numerical simulations. The threshold voltage variation reaches up to 80 mV from the narrowest device to the widest one, considering the studied range of ground plane doping concentration. Concerning the subthreshold swing parameter, neither the GP doping concentration, nor its depth play a significant role since the electrostatic coupling is predominant.


2015 ◽  
Vol 2015 ◽  
pp. 1-6 ◽  
Author(s):  
Yu-Chen Li ◽  
He-Ming Zhang ◽  
Shu-lin Liu ◽  
Hui-Yong Hu

A novel nanoscale fully depleted strained-SOI TFET (FD-SSOI TFET) is proposed and exhaustively simulated through Atlas Device Simulator. It is found that FD-SSOI TFET has the potential of improved on-current and steep subthreshold swing. Furthermore, the effect of strain and dimension on the threshold voltage of FD-SSOI TFET is thoroughly studied by developing a model based on its physical definition. The validity of the model is tested for FD-SSOI TFET by comparison to 2D device simulations. It is shown that the proposed model can predict the trends of threshold voltage very well. This proposed model provides valuable reference to the FD-SSOI TFETs design, simulation, and fabrication.


2003 ◽  
Vol 769 ◽  
Author(s):  
Lihong Teng ◽  
Wayne A. Anderson

AbstractThe properties of thin film transistors (TFT's) on plastic substrates with active silicon films deposited by microwave ECR-CVD were studied. Two types of plastic were used, PEEK and polyimide. The a-Si:H TFT deposited at 200°C on polyimide substrates showed a saturation field effect mobility of 4.5 cm2/V-s, a threshold voltage of 3.7 V, a subthreshold swing of 0.69 V/dec and an ON/OFF current ratio of 7.9×106, while the TFT fabricated on PEEK at 200°C showed a saturation field effect mobility of 3.9 cm2/V-s, a threshold voltage of 4.1 V, a subthreshold swing of 0.73 V/dec and an ON/OFF current ratio of 4×106. Comparison is made to TFT's with the Si deposited at 400°C on glass.


2005 ◽  
Vol 41 (7) ◽  
pp. 449 ◽  
Author(s):  
W.B. Lanford ◽  
T. Tanaka ◽  
Y. Otoki ◽  
I. Adesida

Sign in / Sign up

Export Citation Format

Share Document