High Gain and Low Noise Figure Single-to-Differential CMOS LNA for Ka-Band Communication System

2017 ◽  
Author(s):  
S Raghu ◽  
Punithavathi Duraiswamy
Keyword(s):  
Communication System ◽  
Noise Figure ◽  
High Gain ◽  
Low Noise ◽  
Ka Band ◽  
Cmos Lna

A high gain CMOS LNA for Ka-Band Communication System

2019 ◽  
Author(s):  
Shengjia Liao ◽  
Zhengdong Jiang ◽  
Yiming Yu ◽  
Chenxi Zhao ◽  
Hongyan Tang ◽  
...  
Keyword(s):  
Communication System ◽  
High Gain ◽  
Ka Band ◽  
Cmos Lna

scholarly journals A 5.7GHz low noise figure ultra high gain CMOS LNA with inter stage technique

2010 ◽  
Vol 7 (23) ◽  
pp. 1686-1693 ◽  
Author(s):  
Ehsan Kargaran ◽  
Hojat Khosrowjerdi ◽  
Karim Ghaffarzadegan ◽  
Hooman Nabovati
Keyword(s):  
Noise Figure ◽  
High Gain ◽  
Low Noise ◽  
Cmos Lna

Inductive Feedback Technique for Design of High Gain 0.18μm CMOS LNA for 5G Applications

2021 ◽  
pp. 2150236
Author(s):  
Anjana Jyothi Banu ◽  
G. Kavya ◽  
D. Jahnavi
Keyword(s):  
Reflection Coefficient ◽  
Noise Figure ◽  
Cmos Technology ◽  
High Gain ◽  
Low Noise ◽  
Common Source ◽  
Matching Network ◽  
Input Matching ◽  
Cmos Lna ◽  
Noise Amplifier

A 26[Formula: see text]GHz low-noise amplifier (LNA) designed for 5G applications using 0.18[Formula: see text][Formula: see text]m CMOS technology is proposed in this paper. The circuit includes a common-source in the first stage to suppress the noise in the amplifier. The successive stage has a Cascode topology along with an inductive feedback to improve the power gain. The input matching network is designed to achieve the input reflection coefficient less than [Formula: see text]7dB at the intended frequency. The matching network at the output is designed using inductor–capacitor (LC) components connected in parallel to attain the output reflection coefficient of [Formula: see text]10[Formula: see text]dB. Due to the inductor added in feedback at the second stage. The [Formula: see text] obtained is 18.208[Formula: see text]dB at 26[Formula: see text]GHz with a noise figure (NF) of 2.8[Formula: see text]dB. The power supply given to the LNA is 1.8[Formula: see text]V. The simulation and layout of the presented circuit are performed using Cadence Virtuoso software.

scholarly journals A compact low-noise frontend for interleaved Rx/Tx arrays at K-/Ka-Band

2021 ◽  
pp. 1-7
Author(s):  
Anton Sieganschin ◽  
Thomas Jaschke ◽  
Arne F. Jacob
Keyword(s):  
Insertion Loss ◽  
Printed Circuit Board ◽  
Noise Figure ◽  
Low Noise ◽  
Single Band ◽  
Circuit Board ◽  
Dual Band ◽  
Ka Band ◽  
Compression Properties ◽  
The Individual

Abstract This contribution deals with a frontend for interleaved receive (Rx)-/transmit (Tx)-integrated phased arrays at K-/Ka-band. The circuit is realized in printed circuit board technology and feeds dual-band Rx/Tx- and single-band Tx-antenna elements. The dual-band element feed is composed of a substrate-integrated waveguide (SIW) diplexer with low insertion loss, a low-noise amplifier (LNA), a bandpass filter, and several passive transitions. The compression properties of the LNA are identified through two-tone measurements. The results dictate the maximum allowable output power of the power amplifier. The single band feed consists of a SIW with several transitions. Simulation and measurement results of the individual components are presented. The frontend is assembled and measured. It exhibits an Rx noise figure of 2 dB, a Tx insertion loss of ~ 2.9 dB, and an Rx/Tx-isolation of 70 dB. The setup represents the unit cell of a full array and thus complies with the required half-wave spacing at both Rx and Tx.

scholarly journals A 60 GHz fully differential LNA in 90 nm CMOS technology

2013 ◽  
Vol 6 (2) ◽  
pp. 109-113 ◽  
Author(s):  
Andrea Malignaggi ◽  
Amin Hamidian ◽  
Georg Boeck
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Transmission Lines ◽  
Noise Figure ◽  
Design Procedure ◽  
Cmos Technology ◽  
High Gain ◽  
Low Noise ◽  
60 Ghz ◽  
Fully Differential

The present paper presents a fully differential 60 GHz four stages low-noise amplifier for wireless applications. The amplifier has been optimized for low-noise, high-gain, and low-power consumption, and implemented in a 90 nm low-power CMOS technology. Matching and common-mode rejection networks have been realized using shielded coplanar transmission lines. The amplifier achieves a peak small-signal gain of 21.3 dB and an average noise figure of 5.4 dB along with power consumption of 30 mW and occupying only 0.38 mm2pads included. The detailed design procedure and the achieved measurement results are presented in this work.

Design of 3.1-10.6GHz CMOS LNA Based on Input Matching Technique of Common-Gate Topology

2013 ◽  
Vol 479-480 ◽  
pp. 1014-1017
Author(s):  
Yi Cheng Chang ◽  
Meng Ting Hsu ◽  
Yu Chang Hsieh
Keyword(s):  
Noise Figure ◽  
Supply Voltage ◽  
Average Power ◽  
Wide Band ◽  
Low Noise ◽  
Input Matching ◽  
Common Gate ◽  
Cmos Lna ◽  
Noise Amplifier ◽  
Is Design

In this study, three stage ultra-wide-band CMOS low-noise amplifier (LNA) is presented. The UWB LNA is design in 0.18μm TSMC CMOS technique. The LNA input and output return loss are both less than-10dB, and achieved 10dB of average power gain, the minimum noise figure is 6.55dB, IIP3 is about-9.5dBm. It consumes 11mW from a 1.0-V supply voltage.

scholarly journals Design and Validation of 100 nm GaN-On-Si Ka-Band LNA Based on Custom Noise and Small Signal Models

Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 150 ◽  
Author(s):  
Lorenzo Pace ◽  
Sergio Colangeli ◽  
Walter Ciccognani ◽  
Patrick Ettore Longhi ◽  
Ernesto Limiti ◽  
...  
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Gate Length ◽  
Small Signal ◽  
Linear Measurements ◽  
Ka Band ◽  
Noise Amplifier ◽  
Gan On Si ◽  
Noise Models

In this paper a GaN-on-Si MMIC Low-Noise Amplifier (LNA) working in the Ka-band is shown. The chosen technology for the design is a 100 nm gate length HEMT provided by OMMIC foundry. Both small-signal and noise models had been previously extracted by the means of an extensive measurement campaign, and were then employed in the design of the presented LNA. The amplifier presents an average noise figure of 2.4 dB, a 30 dB average gain value, and input/output matching higher than 10 dB in the whole 34–37.5 Ghz design band, while non-linear measurements testify a minimum output 1 dB compression point of 23 dBm in the specific 35–36.5 GHz target band. This shows the suitability of the chosen technology for low-noise applications.

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