Pair of Replacement Algorithms MFMR and AF-LRU on L1 and L2 Cache for Proxy Server

2009 ◽  
Author(s):  
Richa Gupta ◽  
Sanjiv Tokekar
Keyword(s):  
Proxy Server ◽  
L2 Cache ◽  
Replacement Algorithms ◽  
L1 And L2

Designing of High Performance Multicore Processor with Improved Cache Configuration and Interconnect

2016 ◽  
pp. 204-219
Author(s):  
Ram Prasad Mohanty ◽  
Ashok Kumar Turuk ◽  
Bibhudatta Sahoo
Keyword(s):  
High Performance ◽  
Multicore Processors ◽  
Multicore Processor ◽  
Cache Size ◽  
L2 Cache ◽  
Internal Network ◽  
On Chip ◽  
L1 And L2 ◽  
The Impact ◽  
Cache Configuration

The growing number of cores increases the demand for a powerful memory subsystem which leads to enhancement in the size of caches in multicore processors. Caches are responsible for giving processing elements a faster, higher bandwidth local memory to work with. In this chapter, an attempt has been made to analyze the impact of cache size on performance of Multi-core processors by varying L1 and L2 cache size on the multicore processor with internal network (MPIN) referenced from NIAGRA architecture. As the number of core's increases, traditional on-chip interconnects like bus and crossbar proves to be low in efficiency as well as suffer from poor scalability. In order to overcome the scalability and efficiency issues in these conventional interconnect, ring based design has been proposed. The effect of interconnect on the performance of multicore processors has been analyzed and a novel scalable on-chip interconnection mechanism (INOC) for multicore processors has been proposed. The benchmark results are presented by using a full system simulator. Results show that, using the proposed INoC, compared with the MPIN; the execution time are significantly reduced.

Fuzzy Logic-Based DSE Engine: Reconfiguration for Optimization of Multicore Architectures

2016 ◽  
Vol 25 (12) ◽  
pp. 1650160
Author(s):  
Iqra Farhat ◽  
Muhammad Yasir Qadri ◽  
Nadia N. Qadri ◽  
Jameel Ahmed
Keyword(s):  
Fuzzy Logic ◽  
Energy Consumption ◽  
Design Space Exploration ◽  
Design Space ◽  
Multicore Architectures ◽  
L2 Cache ◽  
On Chip ◽  
L1 And L2 ◽  
The Impact ◽  
Target Design

Moore’s law has been one of the reason behind the evolution of multicore architectures. Modern multicore architectures offer great amount of parallelism and on-chip resources that remain underutilized. This is partly due to inefficient resource allocation by operating system or application being executed. Consequently the poor resource utilization results in greater energy consumption and less throughput. This paper presents a fuzzy logic-based design space exploration (DSE) approach to reconfigure a multicore architecture according to workload requirements. The target design space is explored for L1 and L2 cache size and associativity, operating frequency, and number of cores, while the impact of various configurations of these parameters is analyzed on throughput, miss ratios for L1 and L2 cache and energy consumption. MARSSx86, a cycle accurate simulator, running various SPALSH-2 benchmark applications has been used to evaluate the architecture. The proposed fuzzy logic-based DSE approach resulted in reduction in energy consumption along with an overall improved throughput of the system.

scholarly journals Execution Model to Reduce the Interference of Shared Memory in ARINC 653 Compliant Multicore RTOS

2020 ◽  
Vol 10 (7) ◽  
pp. 2464
Author(s):  
Sihyeong Park ◽  
Mi-Young Kwon ◽  
Hoon-Kyu Kim ◽  
Hyungshin Kim
Keyword(s):  
Execution Time ◽  
Software Verification ◽  
Main Memory ◽  
Critical Systems ◽  
Multicore Architectures ◽  
L2 Cache ◽  
Execution Model ◽  
Time Division ◽  
L1 And L2 ◽  
Execution Models

Multicore architecture is applied to contemporary avionics systems to deal with complex tasks. However, multicore architectures can cause interference by contention because the cores share hardware resources. This interference reduces the predictable execution time of safety-critical systems, such as avionics systems. To reduce this interference, methods of separating hardware resources or limiting capacity by core have been proposed. Existing studies have modified kernels to control hardware resources. Additionally, an execution model has been proposed that can reduce interference by adjusting the execution order of tasks without software modification. Avionics systems require several rigorous software verification procedures. Therefore, modifying existing software can be costly and time-consuming. In this work, we propose a method to apply execution models proposed in existing studies without modifying commercial real-time operating systems. We implemented the time-division multiple access (TDMA) and acquisition execution restitution (AER) execution models with pseudo-partition and message queuing on VxWorks 653. Moreover, we propose a multi-TDMA model considering the characteristics of the target hardware. For the interference analysis, we measured the L1 and L2 cache misses and the number of main memory requests. We demonstrated that the interference caused by memory sharing was reduced by at least 60% in the execution model. In particular, multi-TDMA doubled utilization compared to TDMA and also reduced the execution time by 20% compared to the AER model.

A View of the Lexical–Grammatical Link in Young Latinos With Specific Language Impairment Using Language-Specific and Conceptual Measures

2019 ◽  
Vol 62 (6) ◽  
pp. 1775-1786 ◽  
Author(s):  
Lucía I. Méndez ◽  
Gabriela Simon-Cereijido
Keyword(s):  
Low Income ◽  
Language Impairment ◽  
Specific Language Impairment ◽  
L2 Acquisition ◽  
Cross Sectional ◽  
Specific Language ◽  
Vocabulary Skills ◽  
In The Beginning ◽  
Study Participants ◽  
L1 And L2

Purpose This study investigated the nature of the association of lexical–grammatical abilities within and across languages in Latino dual language learners (DLLs) with specific language impairment (SLI) using language-specific and bilingual measures. Method Seventy-four Spanish/English–speaking preschoolers with SLI from preschools serving low-income households participated in the study. Participants had stronger skills in Spanish (first language [L1]) and were in the initial stages of learning English (second language [L2]). The children's lexical, semantic, and grammar abilities were assessed using normative and researcher-developed tools in English and Spanish. Hierarchical linear regressions of cross-sectional data were conducted using measures of sentence repetition tasks, language-specific vocabulary, and conceptual bilingual lexical and semantic abilities in Spanish and English. Results Results indicate that language-specific vocabulary abilities support the development of grammar in L1 and L2 in this population. L1 vocabulary also contributes to L2 grammar above and beyond the contribution of L2 vocabulary skills. However, the cross-linguistic association between vocabulary in L2 and grammar skills in the stronger or more proficient language (L1) is not observed. In addition, conceptual vocabulary significantly supported grammar in L2, whereas bilingual semantic skills supported L1 grammar. Conclusions Our findings reveal that the same language-specific vocabulary abilities drive grammar development in L1 and L2 in DLLs with SLI. In the early stages of L2 acquisition, vocabulary skills in L1 also seem to contribute to grammar skills in L2 in this population. Thus, it is critical to support vocabulary development in both L1 and L2 in DLLs with SLI, particularly in the beginning stages of L2 acquisition. Clinical and educational implications are discussed.

Measuring Word Learning Ability in Sequential Bilingual Children

2010 ◽  
Vol 17 (1) ◽  
pp. 25-32 ◽  
Author(s):  
Pui Fong Kan
Keyword(s):  
Word Learning ◽  
Learning Ability ◽  
Bilingual Children ◽  
Word Knowledge ◽  
Typically Developing ◽  
Learning Skills ◽  
Word Forms ◽  
The Individual ◽  
Novel Word Learning ◽  
L1 And L2

Abstract The purpose of this article is to look at the word learning skills in sequential bilingual children—children who learn two languages (L1 and L2) at different times in their childhood. Learning a new word is a process of learning a word form and relating this form to a concept. For bilingual children, each concept might need to map onto two word forms (in L1 and in L2). In case studies, I present 3 typically developing Hmong-English bilingual preschoolers' word learning skills in Hmong (L1) and in English (L2) during an 8-week period (4 weeks for each language). The results showed gains in novel-word knowledge in L1 and in L2 when the amount of input is equal for both languages. The individual differences in novel word learning are discussed.

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