Fabrication, optimization and application of complementary Multiple-Gate Tunneling FETs

An analytical gate tunneling current model for MOSFETs

Semiconductors ◽

10.1134/s1063782612030141 ◽

2012 ◽

Vol 46 (3) ◽

pp. 386-390 ◽

Cited By ~ 2

Author(s):

Iman Abaspur Kazerouni ◽

Seyed Ebrahim Hosseini

Keyword(s):

Current Model ◽

Tunneling Current ◽

Gate Tunneling

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Resonant gate tunneling current in double-gate SOI: a simulation study

IEEE Transactions on Electron Devices ◽

10.1109/ted.2003.920126 ◽

2003 ◽

Vol 50 (12) ◽

pp. 2579-2581 ◽

Cited By ~ 3

Author(s):

Chang-Hoon Choi ◽

Zhiping Yu ◽

R.W. Dutton

Keyword(s):

Simulation Study ◽

Tunneling Current ◽

Double Gate ◽

Gate Tunneling

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Numerical Corrections to Estimate Depletion Region Width in Pseudo-two-dimensional Model of Double-Gate Tunneling FET

10.1109/niles53778.2021.9600561 ◽

2021 ◽

Author(s):

Muhammad Elgamal ◽

Ahmed Shaker

Keyword(s):

Depletion Region ◽

Double Gate ◽

Two Dimensional ◽

Dimensional Model ◽

Tunneling Fet ◽

Two Dimensional Model ◽

Gate Tunneling

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Experimental Evidence for Reduction of Gate Tunneling Current in FinFET Structures and Its Dependence on the Fin Width

2006 European Solid-State Device Research Conference ◽

10.1109/essder.2006.307716 ◽

2006 ◽

Cited By ~ 2

Author(s):

Tamara Rudenko ◽

Alexey Nazarov ◽

Valeria Kilchytska ◽

Denis Flandre ◽

Nadine Collaert ◽

...

Keyword(s):

Experimental Evidence ◽

Tunneling Current ◽

Gate Tunneling

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A novel analytical approach to optimize the work functions of dual-material double-gate Tunneling-FETs

Superlattices and Microstructures ◽

10.1016/j.spmi.2018.12.016 ◽

2019 ◽

Vol 126 ◽

pp. 63-71 ◽

Cited By ~ 3

Author(s):

Reza Meshkin ◽

Seyed Ali Sedigh Ziabari ◽

Ahmad Rezaee Jordehi

Keyword(s):

Analytical Approach ◽

Double Gate ◽

Work Functions ◽

Gate Tunneling ◽

Dual Material

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Study on the novel double-gate tunneling field-effect transistor with InAs source

Proceedings of the 2015 4th International Conference on Computer, Mechatronics, Control and Electronic Engineering ◽

10.2991/iccmcee-15.2015.280 ◽

2015 ◽

Author(s):

YueHua Dai ◽

Ning Li ◽

Zhen Chen ◽

Bo Jin

Keyword(s):

Field Effect ◽

Field Effect Transistor ◽

Double Gate ◽

The Novel ◽

Effect Transistor ◽

Gate Tunneling

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Parameter extraction of gate tunneling current in metal–insulator–semiconductor capacitors based on ultra-thin atomic-layer deposited Al2O3

Journal of Materials Science Materials in Electronics ◽

10.1007/s10854-018-9104-2 ◽

2018 ◽

Vol 29 (18) ◽

pp. 15496-15501

Author(s):

Hector Uribe-Vargas ◽

Joel Molina-Reyes

Keyword(s):

Tunneling Current ◽

Atomic Layer ◽

Parameter Extraction ◽

Metal Insulator ◽

Metal Insulator Semiconductor ◽

Gate Tunneling

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A compact model for gate tunneling currents in undoped cylindrical surrounding-gate metal-oxide-semiconductor field-effect transistors

Microelectronic Engineering ◽

10.1016/j.mee.2019.111086 ◽

2019 ◽

Vol 216 ◽

pp. 111086

Author(s):

Fatimah Arofiati Noor ◽

Christoforus Bimo ◽

Ibnu Syuhada ◽

Toto Winata ◽

Khairurrijal Khairurrijal

Keyword(s):

Metal Oxide ◽

Field Effect ◽

Field Effect Transistors ◽

Metal Oxide Semiconductor ◽

Compact Model ◽

Oxide Semiconductor ◽

Surrounding Gate ◽

Gate Tunneling ◽

Tunneling Currents

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An empirical model for static I–V characteristics of double gate tunneling field effect transistor

2013 IEEE 10th International Conference on ASIC ◽

10.1109/asicon.2013.6811948 ◽

2013 ◽

Cited By ~ 1

Author(s):

D. M. Huang ◽

C. J. Yao ◽

D. H. Shi ◽

M. F. Li

Keyword(s):

Empirical Model ◽

Field Effect ◽

Field Effect Transistor ◽

Double Gate ◽

Effect Transistor ◽

Gate Tunneling

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Gate Tunneling Current Predicting Model for Scaled NMOSFET Devices

Advanced Materials Research ◽

10.4028/www.scientific.net/amr.772.422 ◽

2013 ◽

Vol 772 ◽

pp. 422-426

Author(s):

Zhi Chao Zhao ◽

Tie Feng Wu ◽

Hui Bin Ma ◽

Quan Wang ◽

Jing Li

Keyword(s):

Tunneling Current ◽

Gate Oxide ◽

Oxide Thickness ◽

Integral Approach ◽

Predicting Model ◽

Mos Devices ◽

Gate Oxide Thickness ◽

Novel Theory ◽

Gate Tunneling ◽

Thin Gate Oxide

With the scaling of MOS devices, gate tunneling current increases significantly due to thinner gate oxides, and static characteristics of devices and circuit are severely affected by the presence of gate tunneling currents. In this paper, a novel theory gate tunneling current predicting model using integral approach is presented in ultra-thin gate oxide MOS devices that tunneling current changes with gate-oxide thickness. To analyze quantitatively the behaviors of scaled MOS devices in the effects of gate tunneling current and predict the trends, the characteristics of MOS devices are studied in detail using HSPICE simulator. The simulation results in BSIM4 model well agree with the model proposed. The theory and experiment data are contributed to the VLSI circuit design in the future.

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