tunneling fet Latest Research Papers

Tunneling FET based on defect-free, vacancy-defected, and passivated monolayer PtSe2 channel: A first principles study

Materials Science in Semiconductor Processing ◽

10.1016/j.mssp.2021.106258 ◽

2022 ◽

Vol 138 ◽

pp. 106258

Author(s):

Ehsan Norouzzadeh ◽

Saeed Mohammadi ◽

Mahdi Moradinasab

Keyword(s):

First Principles ◽

First Principles Study ◽

Tunneling Fet ◽

Free Vacancy

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Numerical Corrections to Estimate Depletion Region Width in Pseudo-two-dimensional Model of Double-Gate Tunneling FET

10.1109/niles53778.2021.9600561 ◽

2021 ◽

Author(s):

Muhammad Elgamal ◽

Ahmed Shaker

Keyword(s):

Depletion Region ◽

Double Gate ◽

Two Dimensional ◽

Dimensional Model ◽

Tunneling Fet ◽

Two Dimensional Model ◽

Gate Tunneling

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Promised Design of Energy-Efficient Negative-Capacitance Vertical Tunneling FET

ECS Journal of Solid State Science and Technology ◽

10.1149/2162-8777/ac10b4 ◽

2021 ◽

Author(s):

Narasimhulu Thoti ◽

Yiming Li

Keyword(s):

Energy Efficient ◽

Negative Capacitance ◽

Tunneling Fet

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Novel Omega-Gate heterojunction tunneling FET with a new analytical model

Semiconductor Science and Technology ◽

10.1088/1361-6641/abf665 ◽

2021 ◽

Author(s):

Yihong Qing ◽

Te-Kuang Chiang ◽

Lin Wang ◽

Feibo Du ◽

Tiantian Xie ◽

...

Keyword(s):

Analytical Model ◽

Tunneling Fet

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A Novel High-Performance Planar InAs/GaSb Face-Tunneling FET With Implanted Drain for Leakage Current Reduction

IEEE Transactions on Electron Devices ◽

10.1109/ted.2020.3048917 ◽

2021 ◽

Vol 68 (3) ◽

pp. 1313-1317

Author(s):

Zhijun Lyu ◽

Hongliang Lv ◽

Yuming Zhang ◽

Yimen Zhang ◽

Yi Zhu ◽

...

Keyword(s):

Leakage Current ◽

High Performance ◽

Tunneling Fet ◽

Current Reduction

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Linearity Performance and Distortion Analysis of Carbon Nanotube Tunneling FET

Journal of Electronic Materials ◽

10.1007/s11664-020-08707-5 ◽

2021 ◽

Vol 50 (3) ◽

pp. 1496-1505

Author(s):

Sazzad Hussain ◽

Nafis Mustakim ◽

Jibesh Kanti Saha

Keyword(s):

Carbon Nanotube ◽

Tunneling Fet ◽

Distortion Analysis

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Tunneling FET Calibration Issues: Sentaurus vs. Silvaco TCAD

Journal of Physics Conference Series ◽

10.1088/1742-6596/1710/1/012003 ◽

2020 ◽

Vol 1710 ◽

pp. 012003

Author(s):

Amira Nabil ◽

Ahmed Shaker ◽

Mohamed Abouelatta ◽

Hani Ragai ◽

Christian Gontrand

Keyword(s):

Tunneling Fet

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Study of Ambipolar Current of a Steep Slope Tunneling FET with Drain Underlap

2020 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) ◽

10.1109/conecct50063.2020.9198344 ◽

2020 ◽

Author(s):

Satya Gopal Dinda ◽

S. Sundar Kumar Iyer

Keyword(s):

Steep Slope ◽

Tunneling Fet ◽

Ambipolar Current

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A Physical Current Model for Multi-Finger Gate Tunneling FET with Schottky Junction

2020 China Semiconductor Technology International Conference (CSTIC) ◽

10.1109/cstic49141.2020.9282442 ◽

2020 ◽

Author(s):

Yimei Li ◽

Jin Luo ◽

Qianqian Huang ◽

Xia An ◽

Le Ye ◽

...

Keyword(s):

Current Model ◽

Schottky Junction ◽

Tunneling Fet ◽

Gate Tunneling

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Test Structures for Noise Reduction of Fully Depleted-Silicon on Insulator p-Type Tunneling FET Using Channel Orientation

2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS) ◽

10.1109/icmts48187.2020.9107915 ◽

2020 ◽

Author(s):

Hyun-Dong Song ◽

Hyeong-Sub Song ◽

Sunil Babu Eadi ◽

Hyun-Woong Choi ◽

Ga-Won Lee ◽

...

Keyword(s):

Noise Reduction ◽

Silicon On Insulator ◽

Fully Depleted ◽

Tunneling Fet ◽

Channel Orientation ◽

P Type

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tunneling fet
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

Tunneling FET based on defect-free, vacancy-defected, and passivated monolayer PtSe2 channel: A first principles study

Numerical Corrections to Estimate Depletion Region Width in Pseudo-two-dimensional Model of Double-Gate Tunneling FET

Promised Design of Energy-Efficient Negative-Capacitance Vertical Tunneling FET

Novel Omega-Gate heterojunction tunneling FET with a new analytical model

A Novel High-Performance Planar InAs/GaSb Face-Tunneling FET With Implanted Drain for Leakage Current Reduction

Linearity Performance and Distortion Analysis of Carbon Nanotube Tunneling FET

Tunneling FET Calibration Issues: Sentaurus vs. Silvaco TCAD

Study of Ambipolar Current of a Steep Slope Tunneling FET with Drain Underlap

A Physical Current Model for Multi-Finger Gate Tunneling FET with Schottky Junction

Test Structures for Noise Reduction of Fully Depleted-Silicon on Insulator p-Type Tunneling FET Using Channel Orientation

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tunneling fetRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Tunneling FET based on defect-free, vacancy-defected, and passivated monolayer PtSe2 channel: A first principles study

Numerical Corrections to Estimate Depletion Region Width in Pseudo-two-dimensional Model of Double-Gate Tunneling FET

Promised Design of Energy-Efficient Negative-Capacitance Vertical Tunneling FET

Novel Omega-Gate heterojunction tunneling FET with a new analytical model

A Novel High-Performance Planar InAs/GaSb Face-Tunneling FET With Implanted Drain for Leakage Current Reduction

Linearity Performance and Distortion Analysis of Carbon Nanotube Tunneling FET

Tunneling FET Calibration Issues: Sentaurus vs. Silvaco TCAD

Study of Ambipolar Current of a Steep Slope Tunneling FET with Drain Underlap

A Physical Current Model for Multi-Finger Gate Tunneling FET with Schottky Junction

Test Structures for Noise Reduction of Fully Depleted-Silicon on Insulator p-Type Tunneling FET Using Channel Orientation

tunneling fet
Recently Published Documents