15.2 A 0.012mm2 3.1mW bang-bang digital fractional-N PLL with a power-supply-noise cancellation technique and a walking-one-phase-selection fractional frequency divider

2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) ◽

10.1109/isscc.2014.6757429 ◽

2014 ◽

Cited By ~ 1

Author(s):

Jenlung Liu ◽

Tae-Kwang Jang ◽

Yonghee Lee ◽

Jungeun Shin ◽

Seunghoon Lee ◽

...

Keyword(s):

Power Supply ◽

Noise Cancellation ◽

Frequency Divider ◽

Power Supply Noise ◽

Phase Selection ◽

Fractional Frequency ◽

Supply Noise

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A Feed-Forward Power-Supply Noise Cancellation Technique for Single-Ended Class-D Audio Amplifiers

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2014.2298456 ◽

2014 ◽

Vol 49 (3) ◽

pp. 718-728 ◽

Cited By ~ 14

Author(s):

Adrian I. Colli-Menchi ◽

Joselyn Torres ◽

Edgar Sanchez-Sinencio

Keyword(s):

Power Supply ◽

Noise Cancellation ◽

Power Supply Noise ◽

Feed Forward ◽

Audio Amplifiers ◽

Supply Noise ◽

Class D

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A power supply noise cancellation scheme for a 2.24-GHz 6-bit current-steering DAC

2014 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2014.6865344 ◽

2014 ◽

Author(s):

Kei Shiraishi ◽

Daisuke Kurose ◽

Masanori Furuta ◽

Tetsuro Itakura

Keyword(s):

Power Supply ◽

Noise Cancellation ◽

Current Steering ◽

Power Supply Noise ◽

Supply Noise ◽

Current Steering Dac

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AC Power Supply Noise Simulation of CMOS Microprocessor with LSI Chip-Package-Board Integrated Model

IEICE Transactions on Electronics ◽

10.1587/transele.e97.c.264 ◽

2014 ◽

Vol E97.C (4) ◽

pp. 264-271 ◽

Cited By ~ 1

Author(s):

Kumpei YOSHIKAWA ◽

Kouji ICHIKAWA ◽

Makoto NAGATA

Keyword(s):

Power Supply ◽

Integrated Model ◽

Power Supply Noise ◽

Supply Noise ◽

Noise Simulation ◽

Ac Power

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Power-Supply-Noise-Aware Timing Analysis and Test Pattern Regeneration

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e99.a.2320 ◽

2016 ◽

Vol E99.A (12) ◽

pp. 2320-2327

Author(s):

Cheng-Yu HAN ◽

Yu-Ching LI ◽

Hao-Tien KAN ◽

James Chien-Mo LI

Keyword(s):

Power Supply ◽

Test Pattern ◽

Timing Analysis ◽

Power Supply Noise ◽

Supply Noise

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Power Supply Noise-Aware Scan Test Pattern Reshaping for At-Speed Delay Fault Testing of Monolithic 3D ICs *

2020 IEEE 29th Asian Test Symposium (ATS) ◽

10.1109/ats49688.2020.9301568 ◽

2020 ◽

Author(s):

Shao-Chun Hung ◽

Yi-Chen Lu ◽

Sung Kyu Lim ◽

Krishnendu Chakrabarty

Keyword(s):

Power Supply ◽

Test Pattern ◽

Power Supply Noise ◽

Fault Testing ◽

Delay Fault ◽

Delay Fault Testing ◽

3D Ics ◽

Scan Test ◽

Supply Noise

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A GALS Design with Opposite-Phase Local Clock Assignment for Power Supply Noise Reduction

2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) ◽

10.1109/apccas.2018.8605670 ◽

2018 ◽

Author(s):

Nguyen Van Toan ◽

Dam Minh Tung ◽

Jeong-Gun Lee

Keyword(s):

Noise Reduction ◽

Power Supply ◽

Power Supply Noise ◽

Local Clock ◽

Opposite Phase ◽

Supply Noise

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Single-chip multi-processor integrating quadruple 8-way vliw processors with interface timing analysis considering power supply noise

Asia and South Pacific Conference on Design Automation, 2006. ◽

10.1109/aspdac.2006.1594741 ◽

2006 ◽

Author(s):

S. Imai ◽

A. Inoue ◽

M. Matsumura ◽

K. Kawasaki ◽

A. Suga

Keyword(s):

Power Supply ◽

Timing Analysis ◽

Power Supply Noise ◽

Single Chip ◽

Vliw Processors ◽

Supply Noise

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Power supply noise in accurate delay model for the sub-threshold domain

Integration ◽

10.1016/j.vlsi.2015.02.001 ◽

2015 ◽

Vol 50 ◽

pp. 127-136

Author(s):

Pasquale Corsonello ◽

Fabio Frustaci ◽

Stefania Perri

Keyword(s):

Power Supply ◽

Delay Model ◽

Power Supply Noise ◽

Supply Noise ◽

Accurate Delay Model

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Floorplanning with power supply noise avoidance

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1195053 ◽

2003 ◽

Cited By ~ 10

Author(s):

Hung-Ming Chen ◽

Li-Da Huang ◽

I-Min Liu ◽

Minghorng Lai ◽

D.F. Wong

Keyword(s):

Power Supply ◽

Power Supply Noise ◽

Supply Noise

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Layout-Aware Critical Path Delay Test Under Maximum Power Supply Noise Effects

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2011.2163159 ◽

2011 ◽

Vol 30 (12) ◽

pp. 1923-1934 ◽

Cited By ~ 18

Author(s):

Junxia Ma ◽

Mohammad Tehranipoor

Keyword(s):

Power Supply ◽

Critical Path ◽

Maximum Power ◽

Path Delay ◽

Power Supply Noise ◽

Delay Test ◽

Noise Effects ◽

Critical Path Delay ◽

Supply Noise ◽

Path Delay Test

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