F2: Pushing the Frontiers in Accuracy for Data Converters and Analog Circuits

The rapid growth of the hybrid electric vehicles (HEVs) has been driving the demand of high temperature automotive electronics target for the engine compartment, power train, and brakes where the ambient temperature normally exceeds 150°C. An operational transconductance amplifier (OTA) is an essential building block of various analog circuits such as data converters, instrumentation systems, linear regulators, etc. This work presents a high temperature folded cascode operational transconductance amplifier designed and fabricated in a commercially available 0.8-μm BCD-on-SOI process. SOI processes offer several orders of magnitude smaller junction leakage current than bulk-CMOS processes at temperatures beyond 150°C. This amplifier is designed for a high temperature linear voltage regulator; the higher open-loop gain of this amplifier will enhance the overall performance of a linear regulator. In addition, the lower current consumption of the OTA is critical for improving the current efficiency of the linear regulator and reducing the power dissipation at elevated temperature. A PMOS input pair folded cascode OTA topology had been selected in this work, PMOS input pair offers wider ICMR (input common-mode range) and empirically lower flicker noise compared to its NMOS counterpart. By cascoding current mirror load at the output node, the folded cascode OTA obtains higher voltage gain than the symmetrical OTA topology. The PSRR (power supply rejection ratio) is also improved. A on-chip temperature stable current reference is employed to bias the amplifier. The amplifier consumes less than 65μA bias current at 175°C. The core layout area of the amplifier is 0.16mm2 (400 μm × 400 μm).

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Design and Characteristics of CMOS Inverter based on Multisim and Cadence

Journal of Physics Conference Series ◽

10.1088/1742-6596/2108/1/012034 ◽

2021 ◽

Vol 2108 (1) ◽

pp. 012034

Author(s):

Haoran Xu ◽

Jianghua Ding ◽

Jian Dang

Keyword(s):

Metal Oxide ◽

Analog Circuits ◽

Integrated Circuit ◽

Complementary Metal Oxide Semiconductor ◽

Cmos Technology ◽

Data Converters ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Cmos Inverter ◽

And Performance

Abstract Known as complementary symmetrical metal oxide semiconductor (cos-mos), complementary metal oxide semiconductor is a metal oxide semiconductor field effect transistor (MOSFET) manufacturing process, which uses complementary and symmetrical pairs of p-type and n-type MOSFETs to realize logic functions. CMOS technology is used to build integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips (including CMOS BIOS) and other digital logic circuits. CMOS technology is also used in analog circuits, such as image sensors (CMOS sensors), data converters, RF circuits (RF CMOS), and highly integrated transceivers for various types of communications. Based on multisim 14.0 and cadence, the characteristics and performance of CMOS inverter are studied by simulation.

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High Speed Data Converters

10.1049/pbcs026e ◽

2016 ◽

Cited By ~ 2

Author(s):

Ali

Keyword(s):

High Speed ◽

Data Converters ◽

High Speed Data

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Synthesis of Network Functions for the Discrete-Analog Circuits with Switched Capacitors

Elektrichestvo ◽

10.24160/0013-5380-2017-1-47-53 ◽

2017 ◽

pp. 47-53

Author(s):

Konstantin Sergeyevich GORSHKOV ◽

◽

Sergei Aleksandrovich KURGANOV ◽

Vladimir Valentinovich FILARETOV ◽

◽

...

Keyword(s):

Analog Circuits ◽

Discrete Analog ◽

Switched Capacitors ◽

Network Functions

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Relaxing the requirements for accurate spectral testing of data converters

10.31274/etd-180810-3613 ◽

2014 ◽

Author(s):

Benjamin Thomas Magstadt

Keyword(s):

Data Converters ◽

Spectral Testing

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Analog Circuit Failure Analysis Using Time-Resolved Emission

ISTFA 2005: Conference Proceedings from the 31st International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2005p0363 ◽

2005 ◽

Author(s):

B.J. Cain ◽

G.L. Woods ◽

A. Syed ◽

R. Herlein ◽

Toshihiro Nomura

Keyword(s):

Analog Circuits ◽

Integrated Circuit ◽

Analog Circuit ◽

Photon Emission ◽

Nonlinear Process ◽

Time Resolved ◽

Non Invasive ◽

Highly Nonlinear ◽

Excellent Spatial Resolution ◽

5 Ghz

Abstract Time-Resolved Emission (TRE) is a popular technique for non-invasive acquisition of time-domain waveforms from active nodes through the backside of an integrated circuit. [1] State-of-the art TRE systems offer high bandwidths (> 5 GHz), excellent spatial resolution (0.25um), and complete visibility of all nodes on the chip. TRE waveforms are typically used for detecting incorrect signal levels, race conditions, and/or timing faults with resolution of a few ps. However, extracting the exact voltage behavior from a TRE waveform is usually difficult because dynamic photon emission is a highly nonlinear process. This has limited the perceived utility of TRE in diagnosing analog circuits. In this paper, we demonstrate extraction of voltage waveforms in passing and failing conditions from a small-swing, differential logic circuit. The voltage waveforms obtained were crucial in corroborating a theory for some failures inside an 0.18um ASIC.

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Laser Based Analysis on Analog Circuits with Feedback Loops and a Case Study

ISTFA 2006: Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2006p0182 ◽

2006 ◽

Author(s):

Fubin Zhang ◽

David Maxwell

Keyword(s):

Success Rate ◽

High Resistance ◽

Analog Circuits ◽

Analog Circuit ◽

Feedback Loops ◽

Induced Voltage ◽

Analog Device ◽

Analog Ic ◽

Successful Isolation

Abstract Based on the understanding of laser based techniques’ physics theory and the topology/structure of analog circuit systems with feedback loops, the propagation of laser induced voltage/current alteration inside the analog IC is evaluated. A setup connection scheme is proposed to monitor this voltage/current alteration to achieve a better success rate in finding the fail site or defect. Finally, a case of successful isolation of a high resistance via on an analog device is presented.

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Concepts for In Situ Diagnostics in Analog Microelectronic Circuits

ISTFA 2007: Conference Proceedings from the 33rd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2007p0301 ◽

2007 ◽

Author(s):

Ted Kolasa ◽

Alfredo Mendoza

Keyword(s):

Analog Circuits ◽

System Architecture ◽

Analog Circuit ◽

Fault Localization ◽

Diagnostic System ◽

Diagnostic Capability ◽

Common Signal ◽

Diagnostic Capabilities ◽

In Situ Diagnostics

Abstract Comprehensive in situ (designed-in) diagnostic capabilities have been incorporated into digital microelectronic systems for years, yet similar capabilities are not commonly incorporated into the design of analog microelectronics. And as feature sizes shrink and back end interconnect metallization becomes more complex, the need for effective diagnostics for analog circuits becomes ever more critical. This paper presents concepts for incorporating in situ diagnostic capability into analog circuit designs. Aspects of analog diagnostic system architecture are discussed as well as nodal measurement scenarios for common signal types. As microelectronic feature sizes continue to shrink, diagnostic capabilities such as those presented here will become essential to the process of fault localization in analog circuits.

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