Analog Circuit Failure Analysis Using Time-Resolved Emission

Author(s):  
B.J. Cain ◽  
G.L. Woods ◽  
A. Syed ◽  
R. Herlein ◽  
Toshihiro Nomura

Abstract Time-Resolved Emission (TRE) is a popular technique for non-invasive acquisition of time-domain waveforms from active nodes through the backside of an integrated circuit. [1] State-of-the art TRE systems offer high bandwidths (> 5 GHz), excellent spatial resolution (0.25um), and complete visibility of all nodes on the chip. TRE waveforms are typically used for detecting incorrect signal levels, race conditions, and/or timing faults with resolution of a few ps. However, extracting the exact voltage behavior from a TRE waveform is usually difficult because dynamic photon emission is a highly nonlinear process. This has limited the perceived utility of TRE in diagnosing analog circuits. In this paper, we demonstrate extraction of voltage waveforms in passing and failing conditions from a small-swing, differential logic circuit. The voltage waveforms obtained were crucial in corroborating a theory for some failures inside an 0.18um ASIC.

2016 ◽  
Vol 2016 ◽  
pp. 1-13 ◽  
Author(s):  
Yuehai Wang ◽  
Yongzheng Yan ◽  
Qinyong Wang

Fault diagnosis for analog circuit has become a prominent factor in improving the reliability of integrated circuit due to its irreplaceability in modern integrated circuits. In fact fault diagnosis based on intelligent algorithms has become a popular research topic as efficient feature extraction and selection are a critical and intricate task in analog fault diagnosis. Further, it is extremely important to propose some general guidelines for the optimal feature extraction and selection. In this paper, based on wavelet analysis, we will study the problems of mother wavelets selection, number of decomposition levels, and candidate coefficients selection by using a four-op-amp biquad filter circuit. After conducting several comparative experiments, some general guidelines for feature extraction for this type of analog circuits fault diagnosis are derived.


Author(s):  
Prakash Kumar Rout ◽  
Debiprasad Priyabrata Acharya ◽  
Umakanta Nanda

In a system though the analog circuits occupy very less space but they require far more design time than the digital circuits. This is due to the fact that the number of performance measures of an analog circuit is more than those for digital circuits. Predicting and improving the performance, robustness and overall cost of such systems is a major concern in the process of automation. In the automation process, optimization of performances subjected to a verity of environmental constraints is a central task. In this chapter, efficient analog circuit sizing techniques and their optimization are surveyed.


Author(s):  
Jim Vickers ◽  
Nader Pakdaman ◽  
Steven Kasapi

Abstract Dynamic hot-electron emission using time-resolved photon counting can address the long-term failure analysis and debug requirements of the semiconductor industry's advanced devices. This article identifies the detector performance parameters and components that are required to scale and keep pace with the industry's requirements. It addresses the scalability of dynamic emission with the semiconductor advanced device roadmap. It is important to understand the limitations to determining that a switching event has occurred. The article explains the criteria for event detection, which is suitable for tracking signal propagation and looking for logic or other faults in which timing is not critical. It discusses conditions for event timing, whose goal is to determine accurately when a switching event has occurred, usually for speed path analysis. One of the uses of a dynamic emission system is to identify faults by studying the emission as a general function of time.


Author(s):  
Fubin Zhang ◽  
David Maxwell

Abstract Based on the understanding of laser based techniques’ physics theory and the topology/structure of analog circuit systems with feedback loops, the propagation of laser induced voltage/current alteration inside the analog IC is evaluated. A setup connection scheme is proposed to monitor this voltage/current alteration to achieve a better success rate in finding the fail site or defect. Finally, a case of successful isolation of a high resistance via on an analog device is presented.


Author(s):  
Ted Kolasa ◽  
Alfredo Mendoza

Abstract Comprehensive in situ (designed-in) diagnostic capabilities have been incorporated into digital microelectronic systems for years, yet similar capabilities are not commonly incorporated into the design of analog microelectronics. And as feature sizes shrink and back end interconnect metallization becomes more complex, the need for effective diagnostics for analog circuits becomes ever more critical. This paper presents concepts for incorporating in situ diagnostic capability into analog circuit designs. Aspects of analog diagnostic system architecture are discussed as well as nodal measurement scenarios for common signal types. As microelectronic feature sizes continue to shrink, diagnostic capabilities such as those presented here will become essential to the process of fault localization in analog circuits.


Author(s):  
Hung-Sung Lin ◽  
Ying-Chin Hou ◽  
Juimei Fu ◽  
Mong-Sheng Wu ◽  
Vincent Huang ◽  
...  

Abstract The difficulties in identifying the precise defect location and real leakage path is increasing as the integrated circuit design and process have become more and more complicated in nano scale technology node. Most of the defects causing chip leakage are detectable with only one of the FA (Failure Analysis) tools such as LCD (Liquid Crystal Detection) or PEM (Photon Emission Microscope). However, due to marginality of process-design interaction some defects are often not detectable with only one FA tool [1][2]. This paper present an example of an abnormal power consumption process-design interaction related defect which could only be detected with more advanced FA tools.


Electronics ◽  
2021 ◽  
Vol 10 (3) ◽  
pp. 349
Author(s):  
Igor Aizenberg ◽  
Riccardo Belardi ◽  
Marco Bindi ◽  
Francesco Grasso ◽  
Stefano Manetti ◽  
...  

In this paper, we present a new method designed to recognize single parametric faults in analog circuits. The technique follows a rigorous approach constituted by three sequential steps: calculating the testability and extracting the ambiguity groups of the circuit under test (CUT); localizing the failure and putting it in the correct fault class (FC) via multi-frequency measurements or simulations; and (optional) estimating the value of the faulty component. The fabrication tolerances of the healthy components are taken into account in every step of the procedure. The work combines machine learning techniques, used for classification and approximation, with testability analysis procedures for analog circuits.


2021 ◽  
Author(s):  
Rishabh Prakash Sharma ◽  
Max P. Cooper ◽  
Anthony J.C. Ladd ◽  
Piotr Szymczak

<p>Dissolution of porous rocks by reactive fluids is a highly nonlinear process resulting in a variety of dissolution patterns, the character of which depends on physical conditions such as flow rate and reactivity of the fluid. Long, finger-like dissolution channels, “wormholes”, are the main subject of interest in the literature, however, the underlying dynamics of their growth remains unclear. </p><p>While analyzing the tomography data on wormhole growth.  one open question is to define the exact position of the tip of the wormhole. Near the tip the wormhole gradually thins out and the proper resolution of its features is hindered by the finite spatial resolution of the tomographs. In particular, we often observe in the near-tip region several disconnected regions of porosity growth, which - as we hypothesized - are connected by the dissolution channels at subpixel scale. In this study, we show how these features can be better resolved by using numerically calculated flow fields in the reconstructed pore-space. </p><p>We used 70 micrometers, 16-bit grayscale X-ray computed microtomography (XCMT) time series scans of limestone cores, 14mm in diameter and 25mm in length. Scans were performed during the entire dissolution experiment with an interval of 8 minutes. These scans were further processed using a 3-phase segmentation proposed by Luquot et al.[1], in which grayscale voxels are converted to macro-porosity, micro-porosity and grain phases from their grayscale values. The macro-porous phase is assigned a porosity of 1, while the grain phase is assigned 0. Micro-porous regions are assigned an intermediate value determined by linear interpolation between pore and grain threshold using grayscale values. An OpenFOAM based, Darcy-Brinkman solver, porousFoam, is then used to calculate the flow field in this extracted porosity field. </p><p>Porosity contours reconstructed from the tomographs show some disconnected porosity growth near the tip region which later become part of the wormhole in subsequent scans. We have used a novel approach by including the micro-porosity phase in pore-space to calculate the flow-fields in the near-tip region. The calculated flow fields clearly show an extended region of focused flow in front of the wormhole tip, which is a manifestation of the presence of a wormhole at the subpixel scale. These results show that micro-porosity plays an important role in dissolution and 3-phase segmentation combined with the flow field calculations is able to capture the sub-resolved dissolution channels. </p><p> </p><p> [1] Luquot, L., Rodriguez, O., and Gouze, P.: Experimental characterization of porosity structure and transport property changes in limestone undergoing different dissolution regimes, Transport Porous Med., 101, 507–532, 2014</p>


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