Phase interference dependent single PhC based logic gate structure with T-shaped waveguide as XOR, NOT and OR logic gates

Author(s):  
Enaul Haq Shaik ◽  
Nakkeeran Rangaswamy
2021 ◽  
Author(s):  
Abdulqader Mahmoud ◽  
Frederic Vanderveken ◽  
Christoph Adelmann ◽  
Florin Ciubotaru ◽  
Said Hamdioui ◽  
...  

To bring Spin Wave (SW) based computing paradigm into practice and develop ultra low power Magnonic circuits and computation platforms, one needs basic logic gates that operate and can be cascaded within the SW domain without requiring back and forth conversion between the SW and voltage domains. To achieve this, SW gates have to possess intrinsic fanout capabilities, be input-output data representation coherent, and reconfigurable. In this paper, we address the first and the last requirements and propose a novel 4-output programmable SW logic. First, we introduce the gate structure and demonstrate that, by adjusting the gate output detection method, it can parallelly evaluate any 4-element subset of the 2-input Boolean function set AND, NAND, OR, NOR, XOR, and XNOR. Furthermore, we adjust the structure such that all its 4 outputs produce SWs with the same energy and demonstrate that it can evaluate Boolean function sets while providing fanout capabilities ranging from 1 to 4. We validate our approach by instantiating and simulating different gate configurations such as 4-output AND/OR, 4-output XOR/XNOR, output energy balanced 4-output AND/OR, and output energy balanced 4-output XOR/XNOR by means of Object Oriented Micromagnetic Framework (OOMMF) simulations. Finally, we evaluate the performance of our proposal in terms of delay and energy consumption and compare it against existing state-of-the-art SW and 16nm CMOS counterparts. The results indicate that for the same functionality, our approach provides 3x and 16x energy reduction, when compared with conventional SW and 16nm CMOS implementations, respectively.


2021 ◽  
Author(s):  
Abdulqader Mahmoud ◽  
Frederic Vanderveken ◽  
Christoph Adelmann ◽  
Florin Ciubotaru ◽  
Said Hamdioui ◽  
...  

To bring Spin Wave (SW) based computing paradigm into practice and develop ultra low power Magnonic circuits and computation platforms, one needs basic logic gates that operate and can be cascaded within the SW domain without requiring back and forth conversion between the SW and voltage domains. To achieve this, SW gates have to possess intrinsic fanout capabilities, be input-output data representation coherent, and reconfigurable. In this paper, we address the first and the last requirements and propose a novel 4-output programmable SW logic. First, we introduce the gate structure and demonstrate that, by adjusting the gate output detection method, it can parallelly evaluate any 4-element subset of the 2-input Boolean function set AND, NAND, OR, NOR, XOR, and XNOR. Furthermore, we adjust the structure such that all its 4 outputs produce SWs with the same energy and demonstrate that it can evaluate Boolean function sets while providing fanout capabilities ranging from 1 to 4. We validate our approach by instantiating and simulating different gate configurations such as 4-output AND/OR, 4-output XOR/XNOR, output energy balanced 4-output AND/OR, and output energy balanced 4-output XOR/XNOR by means of Object Oriented Micromagnetic Framework (OOMMF) simulations. Finally, we evaluate the performance of our proposal in terms of delay and energy consumption and compare it against existing state-of-the-art SW and 16nm CMOS counterparts. The results indicate that for the same functionality, our approach provides 3x and 16x energy reduction, when compared with conventional SW and 16nm CMOS implementations, respectively.


2021 ◽  
Author(s):  
Bei Li ◽  
Dongsheng Zhao ◽  
Feng Wang ◽  
Xiaoxian Zhang ◽  
Wenqian Li ◽  
...  

This review covers the latest advancements of molecular logic gates based on LMOF. The classification, design strategies, related sensing mechanisms, future developments, and challenges of LMOFs-based logic gates are discussed.


2019 ◽  
Vol 28 (10) ◽  
pp. 1950171 ◽  
Author(s):  
Vinay Kumar ◽  
Ankit Singh ◽  
Shubham Upadhyay ◽  
Binod Kumar

Power dissipation has been the prime concern for CMOS circuits. Approximate computing is a potential solution for addressing this concern as it reduces power consumption resulting in improved performance in terms of power–delay product (PDP). Decrease of power consumption in approximate computing is achieved by approximating the demand of accuracy as per the error tolerance of the system. This paper presents a new approach for designing approximate adder by introducing inexactness in the existing logic gate(s). Approximated logic gates provide flexibility in designing low power error-resilient systems depending on the error tolerance of the applications such as image processing and data mining. The proposed approximate adder (PAA) has higher accuracy than existing approximate adders with normalized mean error distance of 0.123 and 0.1256 for 16-bit and 32-bit adder, respectively, and lower PDP of 1.924E[Formula: see text]18[Formula: see text]J for 16-bit adder and 5.808E[Formula: see text]18[Formula: see text]J for 32-bit adder. The PAA also performs better than some of the recent approximate adders reported in literature in terms of layout area and delay. Performance of PAA has also been evaluated with an image processing application.


2016 ◽  
Vol 16 (5&6) ◽  
pp. 465-482
Author(s):  
Taoufik Said ◽  
Abdelhaq Chouikh ◽  
Karima Essammouni ◽  
Mohamed Bennai

We propose an effective way for realizing a three quantum logic gates (NTCP gate, NTCP-NOT gate and NTQ-NOT gate) of one qubit simultaneously controlling N target qubits based on the qubit-qubit interaction. We use the superconducting qubits in a cavity QED driven by a strong microwave field. In our scheme, the operation time of these gates is independent of the number N of qubits involved in the gate operation. These gates are insensitive to the initial state of the cavity QED and can be used to produce an analogous CNOT gate simultaneously acting on N qubits. The quantum phase gate can be realized in a time (nanosecond-scale) much smaller than decoherence time and dephasing time (microsecond-scale) in cavity QED. Numerical simulation under the influence of the gate operations shows that the scheme could be achieved efficiently within current state-of-the-art technology.


2019 ◽  
Vol 43 (32) ◽  
pp. 12734-12743 ◽  
Author(s):  
Mahesh P. Bhat ◽  
Madhuprasad Kigga ◽  
Harshith Govindappa ◽  
Pravin Patil ◽  
Ho-Young Jung ◽  
...  

A reversible chemosensor for the development of a multi-input molecular logic gate was shown.


2019 ◽  
Vol 16 (158) ◽  
pp. 20190190
Author(s):  
Matthew Egbert ◽  
Jean-Sébastien Gagnon ◽  
Juan Pérez-Mercader

It has been shown that it is possible to transform a well-stirred chemical medium into a logic gate simply by varying the chemistry’s external conditions (feed rates, lighting conditions, etc.). We extend this work, showing that the same method can be generalized to spatially extended systems. We vary the external conditions of a well-known chemical medium (a cubic autocatalytic reaction–diffusion model), so that different regions of the simulated chemistry are operating under particular conditions at particular times. In so doing, we are able to transform the initially uniform chemistry, not just into a single logic gate, but into a functionally integrated network of diverse logic gates that operate as a basic computational circuit known as a full-adder.


Author(s):  
Anthony M. Roy ◽  
Erik K. Antonsson ◽  
Andrew A. Shapiro

Control tasks involving dramatic non-linearities, such as decision making, can be challenging for classical design methods. However, autonomous stochastic design methods have proved effective. In particular, Genetic Algorithms (GA) that create phenotypes by the application of genotypes comprising rules are robust and highly scalable. Such encodings are useful for complex applications such as artificial neural net design. This paper outlines an evolutionary algorithm that creates C++ programs which in turn create Artificial Neural Networks (ANNs) that can functionally perform as an exclusive-OR logic gate. Furthermore, the GAs are able to create scalable ANNs robust enough to feature redundancies that allow the network to function despite internal failures.


Author(s):  
Mohamed Zanaty ◽  
Hubert Schneegans ◽  
Ilan Vardi ◽  
Simon Henein

Abstract Binary logic operations are the building blocks of computing machines. In this paper, we present a new programmable binary logic gate based on programmable multistable mechanisms (PMM), which are multistable structures whose stability behavior depends on modifiable boundary conditions as defined and analyzed in our previous work. The logical state of a PMM is defined by its stability and logical operations are implemented by modifying the stability behavior of the mechanism. Our programmable logic device has two qualitatively different sets of inputs. The first set determines the logic function to be computed. The second set represents the logical inputs. The output is a single logical value, “true” if the mechanism changes state and “false” otherwise. In this way, we are able to mechanically implement a set of binary logical operations. This implementation is validated using an analytical model characterizing the qualitative stability behavior of the mechanism. This was further verified using finite element analysis and experimental demonstration.


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