Analysis of Leakage Failures in Flash Memory Devices and Root Cause Identification

2000 ◽  
Author(s):  
J. N. C. de Luna ◽  
M. O. del Fierro ◽  
J. L. Muñoz
Keyword(s):  
Flash Memory ◽  
Electromagnetic Interference ◽  
Yield Loss ◽  
High Amplitude ◽  
Physical Analysis ◽  
Input Buffer ◽  
Automated Test Equipment ◽  
Root Cause ◽  
Root Cause Identification ◽  
Test Process

Abstract An advanced flash bootblock device was exceeding current leakage specifications on certain pins. Physical analysis showed pinholes on the gate oxide of the n-channel transistor at the input buffer circuit of the affected pins. The fallout contributed ~1% to factory yield loss and was suspected to be caused by electrostatic discharge or ESD somewhere in the assembly and test process. Root cause investigation narrowed down the source to a charged core picker inside the automated test equipment handlers. By using an electromagnetic interference (EMI) locator, we were able to observe in real-time the high amplitude electromagnetic pulse created by this ESD event. Installing air ionizers inside the testers solved the problem.

Failure Analysis Case Study in 0.18μm Flash Memory Devices and Root Cause Identification

2003 ◽  
Author(s):  
Wen-Rong Chen ◽  
Mao-Sheng Wu ◽  
Chi-Ling Chu
Keyword(s):  
Flash Memory ◽  
Defect Density ◽  
Failure Mechanisms ◽  
Storage Test ◽  
Root Cause ◽  
High Temperature Storage ◽  
Program Function ◽  
Root Cause Identification ◽  
Temperature Storage

Abstract This report summarizes the analysis of 0.18µm Flash ROM technology qualification failure cases at Macronix. The cases include single cell read failures, erase/program function failures, and high temperature storage test failures. Electrical analysis, EMMI and physical check by chemical de-processing, parallel lapping, FIB, SEM, PVC and TEM techniques were employed to identify the failure mechanisms, root causes, and solutions. From this study, improvements were achieved in process defect density, test fault coverage and product reliability of the 0.18µm Flash ROM technology.

Applications of Nanoprobing for Localization of Design for Manufacturing Issues on Analogue-to-Digital Converter on Advanced Technology Node

2013 ◽  
Author(s):  
A.C.T. Quah ◽  
C.Q. Chen ◽  
G.B. Ang ◽  
D. Nagalingam ◽  
Y. Li ◽  
...  
Keyword(s):  
Yield Loss ◽  
Process Variations ◽  
Advanced Technology ◽  
Device Performance ◽  
Close Collaboration ◽  
Analog To Digital ◽  
Root Cause ◽  
Atomic Force ◽  
Analogue To Digital ◽  
Root Cause Identification

Abstract This paper describes 2 case studies where device characterizations using Atomic Force Probe (AFP) nanoprobing, allow for the localization and verification of design weakness and process variations on the Analog-to-Digital (ADC) block that resulted in degraded device performance and severe yield loss. In these cases, the sensitive resistor structures in the ADC block was impacted due to design pattern density interaction with process fabrication steps. In addition, close collaboration with customer was also essential for quick root cause identification, design and process fix.

Nanoprobe Characterization of Soft SRAM bit Fails in Advanced Technologies

2019 ◽  
Author(s):  
Satish Kodali ◽  
Chen Zhe ◽  
Chong Khiam Oh
Keyword(s):  
Yield Loss ◽  
Performance Metrics ◽  
Root Cause ◽  
Advanced Technologies ◽  
Capacitance Voltage ◽  
Defect Localization ◽  
Cv Measurements ◽  
Lightly Doped Drain ◽  
Dc Characterization

Abstract Nanoprobing is one of the key characterization techniques for soft defect localization in SRAM. DC transistor performance metrics could be used to identify the root cause of the fail mode. One such case report where nanoprobing was applied to a wafer impacted by significant SRAM yield loss is presented in this paper where standard FIB cross-section on hard fail sites and top down delayered inspection did not reveal any obvious defects. The authors performed nanoprobing DC characterization measurements followed by capacitance-voltage (CV) measurements. Two probe CV measurement was then performed between the gate and drain of the device with source and bulk floating. The authors identified valuable process marginality at the gate to lightly doped drain overlap region. Physical characterization on an inline split wafer identified residual deposits on the BL contacts potentially blocking the implant. Enhanced cleans for resist removal was implemented as a fix for the fail mode.

Marginal RF Gain Investigation and Root Cause Determination

2013 ◽  
Author(s):  
Keith Harber ◽  
Steve Brockett
Keyword(s):  
Radio Frequency ◽  
Failure Analysis ◽  
Power Amplifier ◽  
Physical Analysis ◽  
Root Cause ◽  
S Parameter ◽  
Mode Of Operation ◽  
S Parameters

Abstract This paper outlines the failure analysis of a Radio Frequency only (RF-only) failure on a complex Multimode Multiband Power Amplifier (MMPA) module, where slightly lower gain was observed in one mode of operation. 2 port S-parameter information was collected and utilized to help localize the circuitry causing the issue. A slight DC electrical difference was observed, and simulation was utilized to confirm that difference was causing the observed S-parameters. Physical analysis uncovered a very visible cause for the RF-only failure.

Identifying the Root Cause of Source-Drain Leakage Caused Soft Fail in Advanced Bulk FinFET Devices

2018 ◽  
Author(s):  
Liangshan Chen ◽  
Yuting Wei ◽  
Tanya Schaeffer ◽  
Chongkhiam Oh
Keyword(s):  
Careful Analysis ◽  
Physical Analysis ◽  
Device Structure ◽  
Tem Analysis ◽  
Root Cause ◽  
3D Architecture ◽  
Cause Of Failure ◽  
Electrical Analysis ◽  
Electrical Data

Abstract The paper reports the investigation on the root cause of source-drain leakage in bulk FinFET devices. While the failing device was readily isolated by nanoprobing technique and the electrical analysis pinpointed the potential defect location inside the Fin channel, the identification of physical root cause went through extreme challenges imposed by the tiny-sized device and the unique FinFET 3D architecture. The initial TEM analysis was misled by the projection of a species in the lamella surface and thus could not explain the electrical data. Careful analysis on the device structure was able to identify the origin of the species and led to the discovery of the actual root cause. This paper will provide the analysis details leading to the findings, and highlight the role of electrical understanding in not only providing guidance for physical analysis but also revealing the true root cause of failure in FinFET devices.

A New Approach for SRAM Soft Defect Root Cause Identification

2007 ◽  
Author(s):  
Peter Egger ◽  
Stefan Müller ◽  
Martin Stiftinger
Keyword(s):  
Integrated Circuits ◽  
Top Down ◽  
Feature Size ◽  
Design Rules ◽  
New Approach ◽  
Root Cause ◽  
Wafer Fab ◽  
Sram Cell ◽  
Tcad Simulation ◽  
Root Cause Identification

Abstract With shrinking feature size of integrated circuits traditional FA techniques like SEM inspection of top down delayered devices or cross sectioning often cannot determine the physical root cause. Inside SRAM blocks the aggressive design rules of transistor parameters can cause a local mismatch and therefore a soft fail of a single SRAM cell. This paper will present a new approach to identify a physical root cause with the help of nano probing and TCAD simulation to allow the wafer fab to implement countermeasures.

The Analysis and Simulation of Contact Loss between Pantograph and Catenary on Electric Railway

2015 ◽  
Vol 713-715 ◽  
pp. 1277-1280
Author(s):  
Yin Han Gao ◽  
Ju Xian Wang ◽  
Kai Yu Yang ◽  
Tian Hao Wang ◽  
Zhan Yang An
Keyword(s):  
Equivalent Circuit ◽  
Electromagnetic Interference ◽  
Broad Band ◽  
High Amplitude ◽  
Matlab Simulink ◽  
Arc Model ◽  
Traction Network ◽  
Electric Railway ◽  
The Moment

Based on the classical Mayer-arc model, this paper establishes the equivalent circuit of traction network for AC25kV electric railway from the essence of contact loss discharge. The voltage waves of contact loss arc at different moments are obtained by MATLAB/simulink. Through the analysis, it can be confirmed that the EMI (electromagnetic interference) with broad band and high amplitude will appear at the moment the contact loss between pantograph and catenary happens. Finally, relevant measures are given to avoid the probability event of contact loss.

Transformer-based Alarm Context-Vectorization Representation for Reliable Alarm Root Cause Identification in Optical Networks

2021 ◽  
Author(s):  
Jinwei Jia ◽  
Danshi Wang ◽  
Chunyu Zhang ◽  
Hui Yang ◽  
Luyao Guan ◽  
...  
Keyword(s):  
Optical Networks ◽  
Root Cause ◽  
Root Cause Identification
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