Positive Feedback Frequency Compensation for Low-Voltage Low-Power Three-Stage Amplifier

Author(s):  
J. Ramos ◽  
M.S.J. Steyaert
Author(s):  
Urvashi Bansal ◽  
Maneesha Gupta ◽  
Niranjan Raj

The importance of a transimpedance amplifier in an optical transceiver is very well known. In this paper, a novel CMOS design of the bulk-driven transimpedance amplifier (BD-TIA) is given where the bridge-shunt peaking-based frequency compensation technique is exploited to improve frequency response. A pre-existing active inductor has been used for the same. The electrical characteristics and functioning of this inductor simulator make it a suitable alternative to both floating and grounded spiral inductors. In order to verify the workability of the proposed circuit, it has been simulated with TSMC CMOS 0.18[Formula: see text][Formula: see text]m process parameters. The proposed circuit is useful in low-voltage low-power VLSI applications as it uses a single supply of 0.75[Formula: see text]V. The power consumption of BD-TIA is very low, being 0.37[Formula: see text]mW, because a standard MOSFET has been replaced by a bulk-driven MOSFET (BDMOS), while the 3-dB bandwidth is observed to be 4.5[Formula: see text]GHz. The mathematical investigation and small signal analysis show that the simulation results are in good agreement.


2020 ◽  
Author(s):  
Phanumas Khumsat

<div>This work develops a low-power and low-voltage differential Gm-C filter structure that effectively achieves selfcommon-mode control (SCC), including DC stabilization and common-mode (CM) rejection, without employing extra control circuitry. The structure relies upon an incorporation of voltageinverting amplifiers to make it inherently contain no CM positive feedback loops for DC stabilization, and to enable splitting of the core transconductors into pairs for CM signal rejection. A DC CM stability analysis reveals that stabilization of the SCC structure can be reached without any dedicated CM control circuitry. An analytical comparison on power consumption of a high-order lowpass Gm-C filter implemented using an inverter-based</div><div>transconductor for the SCC structure and the same transconductor with a CM control network (the Nauta’s technique) for the conventional structure indicates theoretical</div><div>overhead power saving by over 50%. Furthermore, an even</div><div>higher overhead power saving at over 70Ên be achieved in the complex SCC Gm-C filter because no additional inverting</div><div>amplifiers are required to eliminate CM positive feedback loops in the crossing transconductors for complexification. The impact of the inverting amplifiers on the noise and frequency characteristics as well as the compensation technique are outlined to enable design optimization. The SCC filter was verified via extensive simulations of a 5th-order 1.1-MHz elliptic complex filter in a 0.18-m CMOS process. As compared to the conventional filter counterpart with similar SNR (~63dB) and inband/out-of-band SFDRs (~52dB/56dB), the proposed structure yields an overhead power saving by 70% with an improved figure-of-merit over 40% under a 1-V supply.</div>


2020 ◽  
Author(s):  
Phanumas Khumsat

<div>This work develops a low-power and low-voltage differential Gm-C filter structure that effectively achieves selfcommon-mode control (SCC), including DC stabilization and common-mode (CM) rejection, without employing extra control circuitry. The structure relies upon an incorporation of voltageinverting amplifiers to make it inherently contain no CM positive feedback loops for DC stabilization, and to enable splitting of the core transconductors into pairs for CM signal rejection. A DC CM stability analysis reveals that stabilization of the SCC structure can be reached without any dedicated CM control circuitry. An analytical comparison on power consumption of a high-order lowpass Gm-C filter implemented using an inverter-based</div><div>transconductor for the SCC structure and the same transconductor with a CM control network (the Nauta’s technique) for the conventional structure indicates theoretical</div><div>overhead power saving by over 50%. Furthermore, an even</div><div>higher overhead power saving at over 70Ên be achieved in the complex SCC Gm-C filter because no additional inverting</div><div>amplifiers are required to eliminate CM positive feedback loops in the crossing transconductors for complexification. The impact of the inverting amplifiers on the noise and frequency characteristics as well as the compensation technique are outlined to enable design optimization. The SCC filter was verified via extensive simulations of a 5th-order 1.1-MHz elliptic complex filter in a 0.18-m CMOS process. As compared to the conventional filter counterpart with similar SNR (~63dB) and inband/out-of-band SFDRs (~52dB/56dB), the proposed structure yields an overhead power saving by 70% with an improved figure-of-merit over 40% under a 1-V supply.</div>


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