Unified model of hole trapping, 1/f noise, and thermally stimulated current in MOS devices

2002 ◽  
Vol 49 (6) ◽  
pp. 2674-2683 ◽  
Author(s):  
D.M. Fleetwood ◽  
H.D. Xiong ◽  
Z.-Y. Lu ◽  
C.J. Nicklaw ◽  
J.A. Felix ◽  
...  
Keyword(s):  
Unified Model ◽  
Thermally Stimulated Current ◽  
Hole Trapping ◽  
Mos Devices

Thermally Stimulated Current Separation of Hole and Acceptor Trap Density in 4H-SiC MOS Devices Using Gamma Ray Irradiation

2010 ◽  
Vol 645-648 ◽  
pp. 469-472
Author(s):  
Marko J. Tadjer ◽  
Karl D. Hobart ◽  
Robert E. Stahlbush ◽  
Patrick J. McMarr ◽  
Hap L. Hughes ◽  
...  
Keyword(s):  
Gamma Ray ◽  
Trap Density ◽  
Thermally Stimulated Current ◽  
Mos Capacitors ◽  
Oxide Charge ◽  
Mos Devices ◽  
Gamma Ray Irradiation

Thermally stimulated current (TSC) measurements on epitaxial and implanted 4H-SiC MOS capacitors are presented. The effect of gamma ray irradiation on the TSC spectra of epitaxial 4H-SiC MOSCAP devices is discussed. On non-irradiated samples, two TSC peaks are observed near 55 K and 80 K. Due to the generated oxide charge during irradiation, the 80 K emission split into two constituent peaks. These have been attributed to hole traps and Al acceptors.

Impact of NO Annealing on Flatband Voltage Instability due to Charge Trapping in SiС MOS Devices

2016 ◽  
Vol 858 ◽  
pp. 599-602 ◽  
Author(s):  
Yoshihito Katsu ◽  
Takuji Hosoi ◽  
Yuichiro Nanen ◽  
Tsunenobu Kimoto ◽  
Takayoshi Shimura ◽  
...  
Keyword(s):  
High Stress ◽  
Charge Trapping ◽  
Oxide Semiconductor ◽  
Mos Capacitor ◽  
Hole Trapping ◽  
Uv Illumination ◽  
Mos Devices ◽  
Voltage Stress ◽  
Flatband Voltage

We evaluated the effect of NO annealing on hole trapping characteristic of SiC metal-oxide-semiconductor (MOS) capacitor by measuring flatband voltage (VFB) shifts during a constant negative gate voltage stress under UV illumination. Under low stress voltages, the VFB shift due to hole trapping was found to be suppressed by NO annealing. However, the VFB shift of the NO-annealed device increases significantly with stress time under high stress voltage conditions, while the device without NO annealing showed only a slight shift. This result implies that NO annealing enhances generation of hole traps, leading to the degradation of SiC-MOS devices in long-term reliability.

Hole Trapping in SiC-MOS Devices Evaluated by Fast- CV Method

2017 ◽  
Author(s):  
M. Hayashi ◽  
M. Sometani ◽  
T. Hatakeyama ◽  
H. Yano ◽  
S. Harada
Keyword(s):  
Hole Trapping ◽  
Mos Devices

Drain-avalanche and hole-trapping induced gate leakage in thin-oxide MOS devices

1988 ◽  
Vol 9 (11) ◽  
pp. 588-590 ◽  
Author(s):  
C. Chang ◽  
S. Haddad ◽  
B. Swaminathan ◽  
J. Lien
Keyword(s):  
Gate Leakage ◽  
Hole Trapping ◽  
Mos Devices ◽  
Thin Oxide

Effect of bias on thermally stimulated current (TSC) in irradiated MOS devices

1991 ◽  
Vol 38 (6) ◽  
pp. 1066-1077 ◽  
Author(s):  
D.M. Fleetwood ◽  
R.A. Reber ◽  
P.S. Winokur
Keyword(s):  
Thermally Stimulated Current ◽  
Mos Devices

Hole trapping in SiC-MOS devices evaluated by fast-capacitance–voltage method

2018 ◽  
Vol 57 (4S) ◽  
pp. 04FR15 ◽  
Author(s):  
Mariko Hayashi ◽  
Mitsuru Sometani ◽  
Tetsuo Hatakeyama ◽  
Hiroshi Yano ◽  
Shinsuke Harada
Keyword(s):  
Hole Trapping ◽  
Mos Devices ◽  
Capacitance Voltage
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