Two-dimensional bias dependent model for the screening length in double-gate Tunnel-FETs

2013 14th International Conference on Ultimate Integration on Silicon (ULIS) ◽

10.1109/ulis.2013.6523483 ◽

2013 ◽

Author(s):

M. Graef ◽

M. Schwarz ◽

T. Holtij ◽

F. Hain ◽

A. Kloes ◽

...

Keyword(s):

Double Gate ◽

Two Dimensional ◽

Screening Length ◽

Dependent Model ◽

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Two-dimensional analytical model of double-gate tunnel FETs with interface trapped charges including effects of channel mobile charge carriers

Journal of Semiconductors ◽

10.1088/1674-4926/38/2/024004 ◽

2017 ◽

Vol 38 (2) ◽

pp. 024004

Author(s):

Huifang Xu ◽

Yuehua Dai

Keyword(s):

Analytical Model ◽

Charge Carriers ◽

Double Gate ◽

Two Dimensional ◽

Mobile Charge ◽

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Two-dimensional model of Dual Metal double gate tunnel FETs

2015 IEEE International WIE Conference on Electrical and Computer Engineering (WIECON-ECE) ◽

10.1109/wiecon-ece.2015.7444001 ◽

2015 ◽

Author(s):

Samantha Lubaba Noor ◽

Samia Safa ◽

Md. Ziaur Rahman Khan

Keyword(s):

Double Gate ◽

Two Dimensional ◽

Dimensional Model ◽

Two Dimensional Model ◽

Tunnel Fets ◽

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Pseudo-Two-Dimensional Model for Double-Gate Tunnel FETs Considering the Junctions Depletion Regions

IEEE Transactions on Electron Devices ◽

10.1109/ted.2010.2040661 ◽

2010 ◽

Vol 57 (4) ◽

pp. 827-834 ◽

Author(s):

Marie Garcia Bardon ◽

Herc P. Neves ◽

Robert Puers ◽

Chris Van Hoof

Keyword(s):

Double Gate ◽

Two Dimensional ◽

Dimensional Model ◽

Two Dimensional Model ◽

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Influence of Localized Interface Charges on Drain Current of Dual-Material Double-Gate Tunnel FETs

2018 3rd International Conference for Convergence in Technology (I2CT) ◽

10.1109/i2ct.2018.8529418 ◽

2018 ◽

Author(s):

Sanjay Kumar ◽

Kamlaksha Baral ◽

Sweta Chander ◽

P. K. Singh ◽

Kunal Singh ◽

...

Keyword(s):

Drain Current ◽

Double Gate ◽

Interface Charges ◽

Tunnel Fets ◽

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Numerical Corrections to Estimate Depletion Region Width in Pseudo-two-dimensional Model of Double-Gate Tunneling FET

10.1109/niles53778.2021.9600561 ◽

2021 ◽

Author(s):

Muhammad Elgamal ◽

Ahmed Shaker

Keyword(s):

Depletion Region ◽

Double Gate ◽

Two Dimensional ◽

Dimensional Model ◽

Tunneling Fet ◽

Two Dimensional Model ◽

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Performance of asymmetric gate oxide on gate-drain overlap in Si and Si1−xGex double gate tunnel FETs

2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA) ◽

10.1109/vlsi-sata.2016.7593036 ◽

2016 ◽

Author(s):

S. Poorvasha ◽

B. Lakshmi

Keyword(s):

Double Gate ◽

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Dual-Metal Graded-Channel Double-Gate Tunnel FETs for Reduction of Ambipolar Conduction

2018 IEEE Electron Devices Kolkata Conference (EDKCON) ◽

10.1109/edkcon.2018.8770449 ◽

2018 ◽

Author(s):

Chandan K. Pandey ◽

Saurabh Chaudhury

Keyword(s):

Double Gate ◽

Tunnel Fets ◽

Ambipolar Conduction

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Double-gate Ge, In As-based tunnel FETs with enhanced ON-current

2016 International Conference on Communication and Signal Processing (ICCSP) ◽

10.1109/iccsp.2016.7754219 ◽

2016 ◽

Author(s):

Chebrolu Gopi ◽

Sudakar Singh Chauhan

Keyword(s):

Double Gate ◽

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Circuit speed oriented device design scheme for GaAsSb/InGaAs double-gate hetero-junction tunnel FETs

Japanese Journal of Applied Physics ◽

10.7567/1347-4065/ab6569 ◽

2020 ◽

Vol 59 (SG) ◽

pp. SGGA06

Author(s):

Koichi Fukuda ◽

Naoya Nogami ◽

Shogo Kunisada ◽

Yasuyuki Miyamoto

Keyword(s):

Double Gate ◽

Device Design ◽

Design Scheme ◽

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Two-dimensional model for double-gate LDMOSFET devices

Journal of Computational Electronics ◽

10.1007/s10825-019-01354-y ◽

2019 ◽

Vol 18 (3) ◽

pp. 882-892 ◽

Author(s):

Mohamed M. El-Dakroury ◽

Zaki Nosseir ◽

Yehea I. Ismail ◽

Hamdy Abdelhamid

Keyword(s):

Double Gate ◽

Two Dimensional ◽

Dimensional Model ◽

Two Dimensional Model

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