High power electronic device measurements of four IGCTs (4.5 kV/4.0 kA) in series connection

2004 ◽  
Author(s):  
Qingguang Yu ◽  
Lili Li ◽  
Qirong Jiang
Keyword(s):  
High Power ◽  
Electronic Device ◽  
Power Electronic ◽  
Series Connection ◽  
In Series

High Power Inverter Circuit from GTO to IGCT and its Application on AC Driving Locomotive

2011 ◽  
Vol 354-355 ◽  
pp. 1394-1399
Author(s):  
Su Rong Qu ◽  
Zhong Yang Zhang
Keyword(s):  
High Power ◽  
Electronic Device ◽  
Superior Performance ◽  
Power Electronic ◽  
Large Power ◽  
Ac Drive ◽  
New Type ◽  
Inverter Circuit ◽  
Type Power ◽  
Paper Author

IGCT is a kind of new type power electronic device which developed from GTO and IGBT . In this paper, Author based on analysis of the internal structure of GTO, shows how GTO development IGCT through technical methods.Through simulation of its off and on performance, the work curve and comparing results of the two devices are given. Then on two components of the inverter circuits are analyzed and compared. Thinking in large power AC drive locomotive, IGCT inverter is greatly simplifier than GTO inverter circuit, and superior performance,it will become the main converter for AC driving locomotive.

p-InGaN/n-GaN Vertical Conducting Diodes onn+-SiC Substrate for High Power Electronic Device Applications

2006 ◽  
Vol 45 (4B) ◽  
pp. 3387-3390 ◽  
Author(s):  
Atsushi Nishikawa ◽  
Kazuhide Kumakura ◽  
Tetsuya Akasaka ◽  
Toshiki Makimoto
Keyword(s):  
High Power ◽  
Electronic Device ◽  
Power Electronic ◽  
Device Applications

scholarly journals A Simple Mismatch Mitigating Partial Power Processing Converter for Solar PV Modules

Energies ◽  
2021 ◽  
Vol 14 (8) ◽  
pp. 2308
Author(s):  
Kamran Ali Khan Niazi ◽  
Yongheng Yang ◽  
Tamas Kerekes ◽  
Dezso Sera
Keyword(s):  
Experimental Tests ◽  
Energy Yield ◽  
Power Electronic ◽  
Solar Pv ◽  
Partial Shading ◽  
Loss Analysis ◽  
Pv Systems ◽  
Pv Module ◽  
Pv Modules ◽  
In Series

Partial shading affects the energy harvested from photovoltaic (PV) modules, leading to a mismatch in PV systems and causing energy losses. For this purpose, differential power processing (DPP) converters are the emerging power electronic-based topologies used to address the mismatch issues. Normally, PV modules are connected in series and DPP converters are used to extract the power from these PV modules by only processing the fraction of power called mismatched power. In this work, a switched-capacitor-inductor (SCL)-based DPP converter is presented, which mitigates the non-ideal conditions in solar PV systems. A proposed SCL-based DPP technique utilizes a simple control strategy to extract the maximum power from the partially shaded PV modules by only processing a fraction of the power. Furthermore, an operational principle and loss analysis for the proposed converter is presented. The proposed topology is examined and compared with the traditional bypass diode technique through simulations and experimental tests. The efficiency of the proposed DPP is validated by the experiment and simulation. The results demonstrate the performance in terms of higher energy yield without bypassing the low-producing PV module by using a simple control. The results indicate that achieved efficiency is higher than 98% under severe mismatch (higher than 50%).

scholarly journals Topologically Rectangular Grids in the Parallel Simulation of Semiconductor Devices

VLSI Design ◽  
1998 ◽  
Vol 6 (1-4) ◽  
pp. 91-95 ◽  
Author(s):  
A. Asenov ◽  
A. R. Brown ◽  
S. Roy ◽  
J. R. Barker
Keyword(s):  
Simulated Annealing Algorithm ◽  
Semiconductor Device ◽  
Electronic Device ◽  
Device Simulation ◽  
Power Electronic ◽  
Two Dimensional ◽  
Solution Strategy ◽  
Rectangular Grids ◽  
Annealing Algorithm ◽  
2D And 3D

Topologically rectangular grids offer simplicity and efficiency in the design of parallel semiconductor device simulators tailored for mesh connected MIMD platforms. This paper presents several approaches to the generation of topologically rectangular 2D and 3D grids. The effects of the partitioning of such grids on different processor configurations are studied. A simulated annealing algorithm is used to optimise the partitioning of 2D and 3D grids on two dimensional arrays of processors. Problems related to the discretization, parallel matrix generation and solution strategy are discussed. The use of topologically rectangular grids is illustrated through the example of power electronic device simulation.

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