Wireless Communication for High-Speed Passenger Rail Services: A Study on the Design and Evaluation of a Unified Architecture

2020 ◽  
Author(s):  
Subharthi Banerjee ◽  
Michael Hempel ◽  
Pejman Ghasemzadeh ◽  
Hamid Sharif ◽  
Tarek Omar
Keyword(s):  
Wireless Communication ◽  
Software Defined Radio ◽  
High Speed ◽  
High Performance ◽  
Large Scale ◽  
Field Tests ◽  
The United States ◽  
Computer Simulation Model ◽  
Passenger Cars ◽  
Ground Truth Data

Abstract High-speed trains, though prevalent in Europe and Asia, are not yet a reality in the US. But interest and industry engagement are growing, especially around commercial hubs close to commuter homes for alleviating commute times. With support from the Federal Railroad Administration in the United States, the authors are exploring the design requirements, challenges, and technology capabilities for wireless communication between passenger cars, on-board systems and with trackside infrastructure, all using next-generation radio access technologies. Key aspects of this work focus on interoperability, modularity of the architecture to facilitate a future-proof design, high-performance operations for passenger services and ultra-low latency capabilities for train control operations. This paper presents the theoretical studies and computer simulations of the proposed network architectures, as well as the results of an LTE/5G field test framework using an OpenAir-Interface (OAI)-based software-defined radio (SDR) approach. Through various test scenarios the OAI LTE/5G implementation is first evaluated in a lab environment and through field tests. These tests provide ground-truth data that can be leveraged to refine the computer simulation model for evaluating large-scale environments with high fidelity and high accuracy. Of particular focus in this evaluation are performance aspects related to delay, handover, bit error rate, frequency offset and achievable uplink/downlink throughput.

scholarly journals Catalytic production of impurity-free V3.5+ electrolyte for vanadium redox flow batteries

2019 ◽  
Vol 10 (1) ◽  
Author(s):  
Jiyun Heo ◽  
Jae-Yun Han ◽  
Soohyun Kim ◽  
Seongmin Yuk ◽  
Chanyong Choi ◽  
...  
Keyword(s):  
High Speed ◽  
High Performance ◽  
Large Scale ◽  
Catalytic Reduction ◽  
Continuous Production ◽  
Vanadium Redox Flow Battery ◽  
Manufacturing Cost ◽  
Chemical Production ◽  
High Manufacturing Cost ◽  
Vanadium Redox

Abstract The vanadium redox flow battery is considered one of the most promising candidates for use in large-scale energy storage systems. However, its commercialization has been hindered due to the high manufacturing cost of the vanadium electrolyte, which is currently prepared using a costly electrolysis method with limited productivity. In this work, we present a simpler method for chemical production of impurity-free V3.5+ electrolyte by utilizing formic acid as a reducing agent and Pt/C as a catalyst. With the catalytic reduction of V4+ electrolyte, a high quality V3.5+ electrolyte was successfully produced and excellent cell performance was achieved. Based on the result, a prototype catalytic reactor employing Pt/C-decorated carbon felt was designed, and high-speed, continuous production of V3.5+ electrolyte in this manner was demonstrated with the reactor. This invention offers a simple but practical strategy to reduce the production cost of V3.5+ electrolyte while retaining quality that is adequate for high-performance operations.

FPGA-Based Intelligent Software Hardening Chip for Computer Numerical Control System

2011 ◽  
Vol 105-107 ◽  
pp. 2217-2220
Author(s):  
Mu Lan Wang ◽  
Jian Min Zuo ◽  
Kun Liu ◽  
Xing Hua Zhu
Keyword(s):  
High Speed ◽  
High Performance ◽  
Large Scale ◽  
Position Control ◽  
Computer Numerical Control ◽  
Numerical Control ◽  
Cnc Machine Tools ◽  
Cnc Machine ◽  
Cnc System ◽  
Intelligent Software

In order to meet the development demands for high-speed and high-precision of Computer Numerical Control (CNC) machine tools, the equipped CNC systems begin to employ the technical route of software hardening. Making full use of the advanced performance of Large Scale Integrated Circuits (LSIC), this paper puts forward using Field Programmable Gates Array (FPGA) for the functional modules of CNC system, which is called Intelligent Software Hardening Chip (ISHC). The CNC system architecture with high performance is constructed based on the open system thought and ISHCs. The corresponding programs can be designed with Very high speed integrate circuit Hardware Description Language (VHDL) and downloaded into the FPGA. These hardening modules, including the arithmetic module, contour interpolation module, position control module and so on, demonstrate that the proposed schemes are reasonable and feasibility.

Towards A Multi-FPGA Infrared Simulator

2007 ◽  
Vol 4 (4) ◽  
pp. 343-355 ◽  
Author(s):  
Vinay Sriram ◽  
David Kearney
Keyword(s):  
Homeland Security ◽  
Reconfigurable Computing ◽  
High Speed ◽  
High Performance ◽  
Large Scale ◽  
Computation Time ◽  
Ccd Camera ◽  
Hardware Acceleration ◽  
Limiting Factor ◽  
Scene Simulation

High speed infrared (IR) scene simulation is used extensively in defense and homeland security to test sensitivity of IR cameras and accuracy of IR threat detection and tracking algorithms used commonly in IR missile approach warning systems (MAWS). A typical MAWS requires an input scene rate of over 100 scenes/second. Infrared scene simulations typically take 32 minutes to simulate a single IR scene that accounts for effects of atmospheric turbulence, refraction, optical blurring and charge-coupled device (CCD) camera electronic noise on a Pentium 4 (2.8GHz) dual core processor [7]. Thus, in IR scene simulation, the processing power of modern computers is a limiting factor. In this paper we report our research to accelerate IR scene simulation using high performance reconfigurable computing. We constructed a multi Field Programmable Gate Array (FPGA) hardware acceleration platform and accelerated a key computationally intensive IR algorithm over the hardware acceleration platform. We were successful in reducing the computation time of IR scene simulation by over 36%. This research acts as a unique case study for accelerating large scale defense simulations using a high performance multi-FPGA reconfigurable computer.

scholarly journals Address of the President Sir Henry Dale, C.B.E., at the Anniversary Meeting, 1 December 1941

1942 ◽  
Vol 179 (978) ◽  
pp. 233-260 ◽  
Keyword(s):  
Technical College ◽  
High Speed ◽  
Large Scale ◽  
Electrical Engineering ◽  
The United States ◽  
The Past ◽  
Pure Mathematics ◽  
Symbolic Structure ◽  
The Church ◽  
Insight Into

This is the first occasion on which I have had the great honour of addressing the Royal Society on this anniversary of its foundation. According to custom, I begin with brief mention of those whom death has taken from our Fellowship during the past year, and whose memories we honour. Alfred Young (1873-1940), distinguished for his contributions to pure mathematics, was half brother to another of our Fellows, Sydney Young, a chemist of eminence. Alfred Young had an insight into the symbolic structure and manipulation of algebra, which gave him a special place among his mathematical contemporaries. After a successful career at Cambridge he entered the Church, and passed his later years in the country rectory of Birdbrook, Essex. His devotion to mathematics continued, however, throughout his life, and he published a steady stream of work in the branch of algebra which he had invented, and named ‘quantitative substitutional analysis’. He lived to see his methods adopted by Weyl in his quantum mechanics and spectroscopy. He was elected to our Fellowship in 1934. With the death of Miles Walker (1868-1941) the Society loses a pioneer in large-scale electrical engineering. Walker was a man of wide interests. He was trained first for the law, and even followed its practice for a period. Later he studied electrical engineering under Sylvanus Thompson at the Finsbury Technical College and became his assistant for several years. Thereafter, encouraged by Thompson, he entered St John’s College, Cambridge, with a scholarship, and graduated with 1st Class Honours in both the Natural Sciences and the Engineering Tripos. Having entered the service of the British Westinghouse Company, he was sent by them to the United States of America to study electrical engineering with the parent company in Pittsburgh. On his return to England he became their leading designer of high-speed electrical generators

Environmental Characterization of Monolithic Ceramics for Gas Turbine Applications

2005 ◽  
Vol 287 ◽  
pp. 367-380 ◽  
Author(s):  
Mattison K. Ferber ◽  
Hua Tay Lin
Keyword(s):  
Silicon Nitride ◽  
Gas Turbines ◽  
High Performance ◽  
Field Tests ◽  
The United States ◽  
Simple Method ◽  
Ceramic Components ◽  
Carbide Ceramics ◽  
Monolithic Ceramics ◽  
Silicon Carbide Ceramics

Over the last 30 years, a number of programs in Russia, Europe, Japan, and the United States have sought to introduce monolithic ceramic components into gas turbines with the goals of increasing efficiency and lowering emissions. High performance silicon nitride and silicon carbide ceramics typically have been leading candidates for use in these applications. Recent field tests involving silicon nitride vanes and blades have shown that these materials can experience significant recession due to the loss of the normally protective silica scale. This paper first summarizes key findings from these field tests and then describes a relatively simple method for evaluating environmental effects in a laboratory environment.

scholarly journals Design of interfaces between high speed data converters and high performance FPGAs for software defined radio applications

2019 ◽  
Vol 71 (4) ◽  
pp. 601-614 ◽  
Author(s):  
Mahadevan Balakrishnan ◽  
Khalim Amjad Meerja ◽  
Kishore Kumar Gundugonti ◽  
Sri Rama Krishna Kalva
Keyword(s):  
Software Defined Radio ◽  
High Speed ◽  
High Performance ◽  
Data Converters ◽  
High Speed Data

Researches in Space Flight Technology

1961 ◽  
Vol 65 (612) ◽  
pp. 779-795
Author(s):  
Abe Silverstein
Keyword(s):  
Wind Tunnel ◽  
Space Flight ◽  
High Speed ◽  
Large Scale ◽  
The United States ◽  
Research Centre ◽  
Memorial Lecture ◽  
Massachusetts Institute Of Technology ◽  
Tunnel Design ◽  
Wilbur Wright

The Forty-Ninth Wilbur Wright Memorial Lecture, “Researches in Space Flight Technology,” was given by Dr. Abe Silverstein, B.S., F.R.Ae.S., F.I.A.S., Director of Space Flight Programs, N.A.S.A., before a large and distinguished audience in the Lecture Theatre, 4 Hamilton Place, on 12th September 1961. Air Marshal Sir Owen Jones, K.B.E., C.B., A.F.C, B.A., D.I.C., F.R.Ae.S., M.I.Mech.E., R.A.F.(retd.), President of the Society, presided. The Lecture was given during the Eighth Anglo-American Aeronautical Conference, and the President was accompanied on the platform by Dr. H. Guyford Stever, President of the Institute of the Aerospace Sciences, and Head of the Mechanical Engineering Department at the Massachusetts Institute of Technology, and Air Commodore W. P. Gouin, R.C.A.F., a member of the Directing Staff of the National Defence College, Canada, and President of the Canadian Aeronautical Institute.As has become the custom, before the Lecture was delivered, the President presented the awards made by the Council for 1961 for outstanding contributions to aeronautics. The list of awards presented on this occasion was published in the June 1961 Journal (p. XXVII).Introducing the Lecturer, the President reminded the audience that the first Wilbur Wright Memorial Lecture was given in 1913 by Horace Darwin. The list of Lecturers, as they would see in their programmes, contained the names of eminent scientists and engineers from America and from this country. They had with them on this occasion a number of those who had given the lecture, among them their very distinguished visitor, Dr. von Kármán.This lecture had been given alternately by a lecturer from this country and one from the United States, with one exception. On one occasion it had been given by the late Professor Ludwig Prandtl—a name well-known to them all.Now Dr. Abe Silverstein was to give the 49th Wilbur Wright Memorial Lecture and had chosen as his subject “Researches in Space Flight Technology.” Dr. Silverstein was Director of Space Flight Programs at the National Aeronautics and Space Administration headquarters in Washington. Before the N.A.S.A. was established on 1st October 1958, Dr. Silverstein had been Associate Director of the Lewis Flight Propulsion Laboratory, Cleveland, a research centre of the National Advisory Committee for Aeronautics, which formed a nucleus of the N.A.S.A. Dr. Silverstein joined the N.A.C.A. in 1929 and spent much time at the Langley Aeronautical Laboratory on wind tunnel design and high speed research until he was transferred to the Lewis Laboratory in 1943 to direct research at the Altitude Wind Tunnel. He had done pioneering work on large scale ram-jet engines and on the supersonic wind tunnels at Lewis.

Communication

2010 ◽  
pp. 47-74
Author(s):  
Valentin Cristea ◽  
Ciprian Dobre ◽  
Corina Stratan ◽  
Florin Pop
Keyword(s):  
Distributed Systems ◽  
Traffic Engineering ◽  
High Speed ◽  
High Performance ◽  
Large Scale ◽  
Data Communication ◽  
Path Diversity ◽  
Grid Systems ◽  
Distributed Communication ◽  
High Bandwidth

Communication in large scale distributed systems has a major impact on the overall performance and widely acceptance of such systems. In this chapter we analyze existing work in enabling high-performance communications in large scale distributed systems, presenting specific problems and existing solutions, as well as several future trends. Because applications running in Grids, P2Ps and other types of large scale distributed systems have specific communication requirements, we present different the problem of delivering efficient communication in case of P2P and Grid systems. We present existing work in enabling high-speed networks to support research worldwide, together with problems related to traffic engineering, QoS assurance, protocols designed to overcome current limitation with the TCP protocol in the context of high bandwidth traffic. We next analyze several group communication models, based on hybrid multicast delivery frameworks, path diversity, multicast trees, and distributed communication. Finally, we analyze data communication solutions specifically designed for P2P and Grid systems.

Energy-Aware Switch Design

2013 ◽  
pp. 341-360 ◽  
Author(s):  
Yukihiro Nakagawa ◽  
Takeshi Shimizu ◽  
Takeshi Horie ◽  
Yoichi Koyanagi ◽  
Osamu Shiraki ◽  
...  
Keyword(s):  
High Speed ◽  
High Performance ◽  
Large Scale ◽  
Single Chip ◽  
Energy Aware ◽  
It Industry ◽  
Gigabit Ethernet ◽  
Switch Architecture ◽  
Large Scale Integration ◽  
Scale Integration

The use of virtualization technology has been increasing in the IT industry to consolidate servers and reduce power consumption significantly. Virtualized commodity servers are scaled out in the data center and increase the demand for bandwidth between servers. Therefore, a high performance switch is required. The shared-memory switch is the best performance/cost switch architecture, but it is challenging to satisfy the requirements on the memory bandwidth in a high speed network. In addition, it is challenging to handle variable-length frames in Ethernet. This chapter describes the main challenges in Ethernet switch designs and then energy-aware switch designs, including switch architecture and high speed IO interface. As implementation examples, this chapter also describes a single-chip switch Large Scale Integration (LSI) embedded with high-speed IO interfaces and 10-Gigabit Ethernet (10GbE) switch blade equipped with the switch LSI. The switch blade delivers 100% more performance per watt than other 10GbE switch blades in the industry.

scholarly journals An Asynchronous Low Power and High Performance VLSI Architecture for Viterbi Decoder Implemented with Quasi Delay Insensitive Templates

2015 ◽  
Vol 2015 ◽  
pp. 1-13 ◽  
Author(s):  
T. Kalavathi Devi ◽  
Sakthivel Palaniappan
Keyword(s):  
Low Power ◽  
Communication Systems ◽  
High Speed ◽  
High Performance ◽  
Large Scale ◽  
Forward Error Correction ◽  
Vlsi Architecture ◽  
Convolutional Codes ◽  
Viterbi Decoder ◽  
Asynchronous Design

Convolutional codes are comprehensively used as Forward Error Correction (FEC) codes in digital communication systems. For decoding of convolutional codes at the receiver end, Viterbi decoder is often used to have high priority. This decoder meets the demand of high speed and low power. At present, the design of a competent system in Very Large Scale Integration (VLSI) technology requires these VLSI parameters to be finely defined. The proposed asynchronous method focuses on reducing the power consumption of Viterbi decoder for various constraint lengths using asynchronous modules. The asynchronous designs are based on commonly used Quasi Delay Insensitive (QDI) templates, namely, Precharge Half Buffer (PCHB) and Weak Conditioned Half Buffer (WCHB). The functionality of the proposed asynchronous design is simulated and verified using Tanner Spice (TSPICE) in 0.25 µm, 65 nm, and 180 nm technologies of Taiwan Semiconductor Manufacture Company (TSMC). The simulation result illustrates that the asynchronous design techniques have 25.21% of power reduction compared to synchronous design and work at a speed of 475 MHz.

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