Crosstalk cancellation using multiple synthesis sources

2017 ◽  
Vol 141 (5) ◽  
pp. 3853-3853
Author(s):  
William M. Hartmann ◽  
Anthony J. Tropiano
2019 ◽  
Author(s):  
john andraos

This paper proposes a standardized format for the preparation of process green synthesis reports that can be applied to chemical syntheses of active pharmaceutical ingredients (APIs) of importance to the pharmaceutical industry. Such a report is comprised of the following eight sections: a synthesis scheme, a synthesis tree, radial pentagons and step E-factor breakdowns for each reaction step, a tabular summary of key material efficiency step and overall metrics for a synthesis plan, a mass process block diagram, an energy consumption audit based on heating and cooling reaction and auxiliary solvents, a summary of environmental and safety-hazard impacts based on organic solvent consumption using the Rowan solvent greenness index, and a cycle time process schedule. Illustrative examples of process green synthesis reports are given for the following pharmaceuticals: 5-HT2B and 5-HT7 receptors antagonist (Astellas Pharma), brivanib (Bristol-Myers Squibb), and orexin receptor agonist (Merck). Methods of ranking synthesis plans to a common target product are also discussed using 6 industrial synthesis plans of apixaban (Bristol-Myers Squibb) as a working example. The Borda count method is suggested as a facile and reliable computational method for ranking multiple synthesis plans to a common target product using the following 4 attributes obtained from a process green synthesis report: process mass intensity, mass of sacrificial reagents used per kg of product, input enthalpic energy for solvents, and Rowan solvent greenness index for organic solvents.<br>


2019 ◽  
Vol 8 (1) ◽  
pp. 787-801
Author(s):  
John Andraos

Abstract This paper proposes a standardized format for the preparation of process green synthesis reports that can be applied to chemical syntheses of active pharmaceutical ingredients (APIs) of importance to the pharmaceutical industry. Such a report is comprised of the following eight sections: a synthesis scheme, a synthesis tree, radial pentagons and step E-factor breakdowns for each reaction step, a tabular summary of key material efficiency step and overall metrics for a synthesis plan, a mass process block diagram, an energy consumption audit based on heating and cooling reaction and auxiliary solvents, a summary of environmental and safety-hazard impacts based on organic solvent consumption using the Rowan solvent greenness index, and a cycle time process schedule. Illustrative examples of process green synthesis reports are given for the following pharmaceuticals: 5-HT2B and 5-HT7 receptors antagonist (Astellas Pharma), brivanib (Bristol-Myers Squibb), and orexin receptor agonist (Merck). Methods of ranking synthesis plans to a common target product are also discussed using 6 industrial synthesis plans of apixaban (Bristol-Myers Squibb) as a working example. The Borda count method is suggested as a facile and reliable computational method for ranking multiple synthesis plans to a common target product using the following 4 attributes obtained from a process green synthesis report: process mass intensity, mass of sacrificial reagents used per kg of product, input enthalpic energy for solvents, and Rowan solvent greenness index for organic solvents.


2005 ◽  
Vol 15 (02) ◽  
pp. 459-476
Author(s):  
C. PATRICK YUE ◽  
JAEJIN PARK ◽  
RUIFENG SUN ◽  
L. RICK CARLEY ◽  
FRANK O'MAHONY

This paper presents the low-power circuit techniques suitable for high-speed digital parallel interfaces each operating at over 10 Gbps. One potential application for such high-performance I/Os is the interface between the channel IC and the magnetic read head in future compact hard disk systems. First, a crosstalk cancellation technique using a novel data encoding scheme is introduced to suppress electromagnetic interference (EMI) generated by the adjacent parallel I/Os . This technique is implemented utilizing a novel 8-4-PAM signaling with a data look-ahead algorithm. The key circuit components in the high-speed interface transceiver including the receive sampler, the phase interpolator, and the transmitter output driver are described in detail. Designed in a 0.13-μm digital CMOS process, the transceiver consumes 310 mW per 10-Gps channel from a I-V supply based on simulation results. Next, a 20-Gbps continuous-time adaptive passive equalizer utilizing on-chip lumped RLC components is described. Passive equalizers offer the advantages of higher bandwidth and lower power consumption compared with conventional designs using active filter. A low-power, continuous-time servo loop is designed to automatically adjust the equalizer frequency response for the optimal gain compensation. The equalizer not only adapts to different channel characteristics, but also accommodates temperature and process variations. Implemented in a 0.25-μm, 1P6M BiCMOS process, the equalizer can compensate up to 20 dB of loss at 10 GHz while only consumes 32 mW from a 2.5-V supply.


2012 ◽  
Vol 20 (6) ◽  
pp. 1829-1842 ◽  
Author(s):  
Jan Ole Jungmann ◽  
Radoslaw Mazur ◽  
Markus Kallinger ◽  
Tiemin Mei ◽  
Alfred Mertins

2014 ◽  
Vol 32 (21) ◽  
pp. 3974-3981 ◽  
Author(s):  
Jiannan Zhu ◽  
Jonathan D. Ingham ◽  
Johannes Benedikt von Lindeiner ◽  
Adrian Wonfor ◽  
Richard V. Penty ◽  
...  

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