CONTROLLING INSTABILITIES OF HYDROGENERATED a-Si:H TFT UNDER BIAS TEMPERATURE STRESSING

The hydrogenerated amorphous silicon a-Si:H thin film transistors TFT with silicon nitride as a gate insulator have been stressed with independently varying gate (Vg), source (Vs), and gate-source (Vgs) bias voltage in order to elucidate the instability mechanism and suggest the new a-Si:H TFT structure. It was found that there was dependency of threshold voltage shift not only on Vgs, but also on Vg and Vs, which had not ever been reported. Its shift amount increased with increasing Vs and/or Vg. In this reports, we suggested the new TFT device structure to eliminate the dependency of Vth shift on Vg and Vs and found that with the new suggested TFT structure, the Vth shift controlling factor can only be Vgs.

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Material Properties Controlling the Performance of Amorphous Silicon Thin Film Transistors

MRS Proceedings ◽

10.1557/proc-33-259 ◽

1984 ◽

Vol 33 ◽

Cited By ~ 27

Author(s):

M. J. Powell

Keyword(s):

Thin Film ◽

Silicon Nitride ◽

Amorphous Silicon ◽

Density Of States ◽

Threshold Voltage ◽

Material Properties ◽

Thin Film Transistors ◽

Gate Insulator ◽

Dangling Bond ◽

Silicon Thin Film

ABSTRACTAmorphous silicon thin film transistors have been fabricated with a number of different structures and materials. To date, the best performance is obtained with amorphous silicon - silicon nitride thin film transistors in the inverted staggered electrode structure, where the gate insulator and semiconductor are deposited sequentially by plasma enhanced chemical vapour deposition in the same growth apparatus.Localised electron states in the amorphous silicon are crucial in determining transistor performance. Conduction band states (Si-Si antibonding σ*) are broadened and localised in the amorphous network, and their energy distribution determines the field effect mobility. The silicon dangling bond defect is the most important deep localised state and their density determines the prethreshold current and hence the threshold voltage. The density of states is influenced by the gate insulator interface and there is probably a decreasing density of states away from this interface. The silicon dangling bond defect in the bulk amorphous silicon nitride also leads to a localised gap state, which is responsible for the observed threshold voltage instability.Other key material properties include the fixed charge densities associated with primary passivating layers placed on top of the amorphous silicon. The low value of the bulk density of states in the amorphous silicon layer increases the sensitivity of device characteristics to charge at the top interface.

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Investigation on the Electrical Stability of 5,11-Bis(triethylsilylethynyl)anthradithiophene Thin-Film Transistors

Journal of Nanoscience and Nanotechnology ◽

10.1166/jnn.2021.18904 ◽

2021 ◽

Vol 21 (3) ◽

pp. 1754-1760

Author(s):

Joel Ndikumana ◽

Jyothi Chintalapalli ◽

Jin-Hyuk Kwon ◽

Jin-Hyuk Bae ◽

Jaehoon Park

Keyword(s):

Thin Film ◽

Threshold Voltage ◽

Thin Film Transistors ◽

Ambient Air ◽

Gate Insulator ◽

Hydroxyl Groups ◽

Electrical Stability ◽

Threshold Voltage Shift ◽

Voltage Shift ◽

Domain Boundaries

We investigate the effects of environmental conditions on the electrical stability of spin-coated 5,11-bis(triethylsilylethynyl)anthradithiophene (TES-ADT) thin-film transistors (TFTs) in which crosslinked poly(4-vinylphenol-co-methyl methacrylate) (PVP-co-PMMA) was utilized as a gate insulator layer. Atomic force microscopy observations show molecular terraces with domain boundaries in the spin-coated TEST-ADT semiconductor film. The TFT performance was observed to be superior in the ambient air condition. Under negative gate-bias stress, the TES-ADT TFTs showed a positive threshold voltage shift in ambient air and a negative threshold voltage shift under vacuum. These results are explained through a chemical reaction between water molecules in air and unsubstituted hydroxyl groups in the cross-linked PVP-co-PMMA as well as a charge-trapping phenomenon at the domain boundaries in the spin-coated TES-ADT semiconductor.

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Threshold Voltage Shift of Amorphous Silicon Thin-Film Transistors During Pulse Operation

Japanese Journal of Applied Physics ◽

10.1143/jjap.30.3719 ◽

1991 ◽

Vol 30 (Part 1, No. 12B) ◽

pp. 3719-3723 ◽

Cited By ~ 21

Author(s):

Ryoji Oritsuki ◽

Toshikazu Horii ◽

Akira Sasano ◽

Ken Tsutsui ◽

Toshiko Koizumi ◽

...

Keyword(s):

Thin Film ◽

Amorphous Silicon ◽

Threshold Voltage ◽

Thin Film Transistors ◽

Silicon Thin Film ◽

Pulse Operation ◽

Threshold Voltage Shift ◽

Voltage Shift

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Proximity Recovery Layers to Speed up the Recovery of Stressed Amorphous Silicon Thin-Film Transistors

MRS Proceedings ◽

10.1557/proc-192-355 ◽

1990 ◽

Vol 192 ◽

Cited By ~ 1

Author(s):

M. Hack ◽

W. B. Jackson ◽

R. Lujan

Keyword(s):

Thin Film ◽

Amorphous Silicon ◽

High Voltage ◽

Threshold Voltage ◽

Thin Film Transistors ◽

Hydrogenated Amorphous Silicon ◽

Silicon Thin Film ◽

Threshold Voltage Shift ◽

Speed Up ◽

Hydrogenated Amorphous

ABSTRACTWe have developed a means to speed up the recovery of both the threshold voltage shift of hydrogenated amorphous silicon (a-Si:H) transistors and the Vx shift of high voltage a-Si devices. This is accomplished by placing a lightly doped compensated layer adjacent to the active layer in these transistors. This proximity recovery layer does not alter the initial characteristics of a-Si:H transistors and is completely process compatible with standard fabrication procedures.

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A Substrate Bias Effect on Recovery of the Threshold Voltage Shift of Amorphous Silicon Thin-Film Transistors

Japanese Journal of Applied Physics ◽

10.1143/jjap.46.4042 ◽

2007 ◽

Vol 46 (7A) ◽

pp. 4042-4045 ◽

Cited By ~ 2

Author(s):

Chang-Wook Han ◽

Min-Koo Han ◽

Nack-Bong Choi ◽

Chang-Dong Kim ◽

Ki-Yong Kim ◽

...

Keyword(s):

Thin Film ◽

Amorphous Silicon ◽

Threshold Voltage ◽

Thin Film Transistors ◽

Substrate Bias ◽

Silicon Thin Film ◽

Bias Effect ◽

Threshold Voltage Shift ◽

Voltage Shift

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Threshold voltage shift of amorphous silicon thin‐film transistors by step doping

Applied Physics Letters ◽

10.1063/1.100892 ◽

1989 ◽

Vol 54 (7) ◽

pp. 606-607 ◽

Cited By ~ 3

Author(s):

T. Matsumoto ◽

Y. Mishima ◽

K. Yanai ◽

K. Oki

Keyword(s):

Thin Film ◽

Amorphous Silicon ◽

Threshold Voltage ◽

Thin Film Transistors ◽

Silicon Thin Film ◽

Threshold Voltage Shift ◽

Voltage Shift

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Influence of H2O and O2 on threshold voltage shift in organic thin-film transistors: Deprotonation of SiOH on SiO2 gate-insulator surface

Applied Physics Letters ◽

10.1063/1.2890853 ◽

2008 ◽

Vol 92 (9) ◽

pp. 093309 ◽

Cited By ~ 76

Author(s):

Daisuke Kumaki ◽

Tokiyoshi Umeda ◽

Shizuo Tokito

Keyword(s):

Thin Film ◽

Threshold Voltage ◽

Thin Film Transistors ◽

Organic Thin Film Transistors ◽

Gate Insulator ◽

Organic Thin Film ◽

Threshold Voltage Shift ◽

Voltage Shift ◽

Insulator Surface

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Low-Temperature Formation of SiNx Gate Insulator for Thin-Film Transistor Using CAT-CVD Method

MRS Proceedings ◽

10.1557/proc-508-151 ◽

1998 ◽

Vol 508 ◽

Author(s):

A. Izumi ◽

T. Ichise ◽

H. Matsumura

Keyword(s):

Thin Film ◽

Chemical Vapor Deposition ◽

Silicon Nitride ◽

Vapor Deposition ◽

Thin Film Transistors ◽

Chemical Vapor ◽

State Density ◽

Gate Insulator ◽

Catalytic Chemical Vapor Deposition ◽

Silicon Nitride Films

AbstractSilicon nitride films prepared by low temperatures are widely applicable as gate insulator films of thin film transistors of liquid crystal displays. In this work, silicon nitride films are formed around 300 °C by deposition and direct nitridation methods in a catalytic chemical vapor deposition system. The properties of the silicon nitride films are investigated. It is found that, 1) the breakdown electric field is over 9MV/cm, 2) the surface state density is about 1011cm−2eV−1 are observed in the deposition films. These result shows the usefulness of the catalytic chemical vapor deposition silicon nitride films as gate insulator material for thin film transistors.

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Analysis of Threshold Voltage Shift for Full VGS/VDS/Oxygen-Content Span under Positive Bias Stress in Bottom-Gate Amorphous InGaZnO Thin-Film Transistors

Micromachines ◽

10.3390/mi12030327 ◽

2021 ◽

Vol 12 (3) ◽

pp. 327

Author(s):

Je-Hyuk Kim ◽

Jun Tae Jang ◽

Jong-Ho Bae ◽

Sung-Jin Choi ◽

Dong Myong Kim ◽

...

Keyword(s):

Thin Film ◽

Electric Field ◽

Oxygen Content ◽

Threshold Voltage ◽

Thin Film Transistors ◽

Electron Trapping ◽

Threshold Voltage Shift ◽

Voltage Shift ◽

Drain Side ◽

Bottom Gate

In this study, we analyzed the threshold voltage shift characteristics of bottom-gate amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) under a wide range of positive stress voltages. We investigated four mechanisms: electron trapping at the gate insulator layer by a vertical electric field, electron trapping at the drain-side GI layer by hot-carrier injection, hole trapping at the source-side etch-stop layer by impact ionization, and donor-like state creation in the drain-side IGZO layer by a lateral electric field. To accurately analyze each mechanism, the local threshold voltages of the source and drain sides were measured by forward and reverse read-out. By using contour maps of the threshold voltage shift, we investigated which mechanism was dominant in various gate and drain stress voltage pairs. In addition, we investigated the effect of the oxygen content of the IGZO layer on the positive stress-induced threshold voltage shift. For oxygen-rich devices and oxygen-poor devices, the threshold voltage shift as well as the change in the density of states were analyzed.

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Improved Mobility and Bias Stability of Thin Film Transistors Using the Double-Layer a-InGaZnO/a-InGaZnO:N Channel

Journal of Nanoscience and Nanotechnology ◽

10.1166/jnn.2016.12340 ◽

2016 ◽

Vol 16 (4) ◽

pp. 3659-3663

Author(s):

H Yu ◽

L Zhang ◽

X. H Li ◽

H. Y Xu ◽

Y. C Liu

Keyword(s):

Thin Film ◽

Double Layer ◽

Thin Film Transistors ◽

Carrier Transport ◽

Single Layer ◽

Channel Structure ◽

Gate Insulator ◽

Large Area ◽

Threshold Voltage Shift ◽

High Carrier

The amorphous indium-gallium-zinc oxide (a-IGZO) thin film transistors (TFTs) were demonstrated based on a double-layer channel structure, where the channel is composed of an ultrathin nitrogenated a-IGZO (a-IGZO:N) layer and an undoped a-IGZO layer. The double-layer channel device showed higher saturation mobility and lower threshold-voltage shift (5.74 cm2/Vs, 2.6 V) compared to its single-layer counterpart (0.17 cm2/Vs, 7.23 V). The improvement can be attributed to three aspects: (1) improved carrier transport properties of the channel by the a-IGZO:N layer with high carrier mobility and the a-IGZO layer with high carrier concentration, (2) reduced interfacial trap density between the active channel and the gate insulator, and (3) higher surface flatness of the double-layer channel. Our study reveals key insights into double-layer channel, involving selecting more suitable electrical property for back-channel layer and more suitable interface modification for active layer. Meanwhile, room temperature fabrication amorphous TFTs offer certain advantages on better flexibility and higher uniformity over a large area.

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