A CMOS LNA Partially Degenerated Topology Proposal Using Active Inductors
2017 ◽
Vol 26
(05)
◽
pp. 1750078
Keyword(s):
Cmos Lna
◽
This paper presents the design of a CMOS low-noise amplifier (LNA) with partial inductive degeneration using active inductors in [Formula: see text]m technology. Both, the inductor of the partial degeneration and the load inductor, are actives. The inductors configurations are cascode with feedback resistance and Wu folded compact. The LNA has a gain of 13.2[Formula: see text]dB and a noise figure of 4.7[Formula: see text]dB at 1.8[Formula: see text]GHz. The layout has an active area of [Formula: see text]. The results are satisfactory, validating the compact design and demonstrating the technical feasibility of this proposed topology.
Keyword(s):
2007 ◽
Vol 17
(7)
◽
pp. 546-548
◽
2017 ◽
Vol 7
(1.3)
◽
pp. 69
Keyword(s):