A Novel Bipolar Photon-Controlled Generalized Memristor Based on Avalanche Photodiode

2020 ◽  
pp. 2150090
Author(s):  
Jianxiu Hao ◽  
Xiangliang Jin ◽  
Bo Peng
Keyword(s):  
Topological Structure ◽  
Hysteresis Loops ◽  
Avalanche Photodiode ◽  
Circuit Model ◽  
Traditional Model ◽  
Circuit Simulator ◽  
Dynamical Characteristics ◽  
Spice Model ◽  
Pinched Hysteresis Loop ◽  
Pinched Hysteresis

A novel bipolar photon-controlled generalized memristor model with an avalanche photodiode (APD) passive quenching circuit is presented in this paper. The SPICE model of the circuit is established and its fingerprints are analyzed by the pinched hysteresis loops with different bipolar periodic stimuli. The dynamical characteristics of the proposed circuit model are investigated both theoretically and simulatively. The results verified by Cadence Spectre circuit simulator demonstrate that the proposed circuit model is a simple bipolar photon-controlled generalized memristor. Compared with the previously published memristor models, the biggest innovation of this paper is to propose a bipolar generalized memristor model instead of the traditional model, which can easily form the pinched hysteresis loop. Another highlight is that the generalized memristor model in this paper is controlled by photons while conventional memristors are charge-controlled/flux-controlled. Furthermore, the circuit level models are more stable, more reliable and more resistant to interference than the device level models. The topological structure of the proposed circuit model in this paper is much more simpler.

scholarly journals CMOS Realization of All-Positive Pinched Hysteresis Loops

Complexity ◽  
2017 ◽  
Vol 2017 ◽  
pp. 1-15 ◽  
Author(s):  
B. J. Maundy ◽  
A. S. Elwakil ◽  
C. Psychalinos
Keyword(s):  
Hysteresis Loop ◽  
Detailed Analysis ◽  
Hysteresis Loops ◽  
Nonlinear Circuits ◽  
Experimental Results ◽  
First Order ◽  
Pinched Hysteresis Loop ◽  
A Charge ◽  
Pinched Hysteresis ◽  
Nmos Transistors

Two novel nonlinear circuits that exhibit an all-positive pinched hysteresis loop are proposed. These circuits employ two NMOS transistors, one of which operates in its triode region, in addition to two first-order filter sections. We show the equivalency to a charge-controlled resistance (memristance) in a decremental state via detailed analysis. Simulation and experimental results verify the proposed theory.

scholarly journals A Novel Generalized Memristor Based on Three-Phase Diode Bridge Rectifier

Complexity ◽  
2019 ◽  
Vol 2019 ◽  
pp. 1-8
Author(s):  
Chaojun Wu ◽  
Ningning Yang ◽  
Cheng Xu ◽  
Rong Jia ◽  
Chongxin Liu
Keyword(s):  
Hysteresis Loops ◽  
Normal Operation ◽  
Rectifier Circuit ◽  
The Third ◽  
Three Phase ◽  
Bridge Rectifier ◽  
Pinched Hysteresis Loop ◽  
Intersection Points ◽  
Simulation Results ◽  
Pinched Hysteresis

Memristive characteristics in three-phase diode bridge rectifier circuit are proposed in this paper. The conduction of the diodes is discussed and the characteristics of the pinched hysteresis loop are analyzed by both numerical simulations and circuit simulations. The hysteresis loops of each phase not only are pinched at the origin but also have the other two intersection points in the first quadrant and the third quadrant when three-phase bridge rectifier circuit is running under normal operation. Other conditions are also discussed when a variety of faults conditions occur. The simulation results verify that the three-phase bridge rectifier circuit can be described as a generalized memristor element during several operation states.

Computing Areas of Pinched Hysteresis Loops of Mem-Systems in OrCAD PSPICE

2013 ◽  
Vol 278-280 ◽  
pp. 1081-1090 ◽  
Author(s):  
Dalibor Biolek ◽  
Zdenek Biolek ◽  
Viera Biolkova ◽  
Zdenek Kolka
Keyword(s):  
Hysteresis Loop ◽  
Memory Effect ◽  
Hysteresis Loops ◽  
Simulation Software ◽  
Excitation Signal ◽  
Pspice Simulation ◽  
Special Cases ◽  
Special Measuring ◽  
Pinched Hysteresis Loop ◽  
Pinched Hysteresis

The pinched hysteresis loop belongs to the fingerprints of the so-called mem-systems, their well-known special cases being memristors. The memory effect of the system is determined by the area of the curve lobes which gradually decrease with increasing repeating frequency of the excitation signal. The paper describes a method for automated computation of the above areas via the commonly utilized OrCAD PSpice simulation software with the help of special measuring functions of the PROBE postprocessor. The usefulness of the method is illustrated on an example of the analysis of a TiO2 memristor.

Effect of Isovalent B-Site Doping on Structural and Electrical Properties of Bismuth-Sodium-Titanate

2014 ◽  
Vol 90 ◽  
pp. 43-50 ◽  
Author(s):  
Klaus Reichmann ◽  
Michael Naderer ◽  
Jörg Albering ◽  
Franz Andreas Mautner
Keyword(s):  
Loss Factor ◽  
Ionic Radius ◽  
Hysteresis Loops ◽  
Sodium Titanate ◽  
Electron Configuration ◽  
Bismuth Sodium Titanate ◽  
Structural And Electrical Properties ◽  
Pinched Hysteresis Loop ◽  
Pinched Hysteresis ◽  
Bismuth Sodium

Samples exhibiting substitution of Titanium in Bismuth-Sodium-Titanate (BNT) by isovalent Zirconium, Tin and Germanium (Bi0.5Na0.5Ti(1-x)DxO3 with D = Zr, Ge and Sn and x = 0.0025; 0.0050; 0.01; 0.02; 0.04; 0.08) were investigated with respect to microstructure, relative permittivity, loss factor and polarization. The substituents differ in mass, ionic radius and d-electron configuration. The shift of transitions observed in plots of permittivity and loss factor vs. temperature indicate the influence of the ionic radius. The occurrence of a pinched hysteresis loop at ambient temperature in the Sn-doped samples and the absence of any pinching in the hysteresis loops of Zr-and Ge-doped samples give rise to the assumption that this feature of polarization is connected to the ionic radius combined with the d10 electron configuration of Sn4+.

Sunpatiens compact hot coral: memristors in flowers

2018 ◽  
Vol 45 (2) ◽  
pp. 222 ◽  
Author(s):  
Alexander G. Volkov ◽  
Eunice K. Nyasani
Keyword(s):  
Hysteresis Loop ◽  
Plasma Membranes ◽  
Hysteresis Loops ◽  
Electrical Current ◽  
Low Frequencies ◽  
Current Voltage ◽  
Pinched Hysteresis Loop ◽  
Pinched Hysteresis ◽  
With Memory

Leon Chua postulated the theory of a memristor – a resistor with memory – in 1971, and the first solid-state memristor was built in 2008. Memristors exist in vivo as components of plasma membranes in plants, fruits, roots and seeds. A memristor is a nonlinear element; its current-voltage characteristic is similar to that of a Lissajous pattern. Here, we found memristors in flowers. Electrostimulation by bipolar periodic sinusoidal or triangular waves of an androecium, a spur, petals and a pedicel in Sunpatiens flowers induces hysteresis loops with a pinched point at low frequencies between 0.1 mHz and 1 mHz. At high frequencies, the pinched hysteresis loop transforms to a non-pinched hysteresis loop instead of a single line I = U/R for ideal memristors because the amplitude of electrical current depends on capacitance of a flower’s tissue and electrodes, frequency and direction of scanning. The discovery of memristors in Sunpatiens (Impatiens spp.) creates a new direction in the modelling and understanding of electrophysiological phenomena in flowers.

New Grounded and Floating Memristor-Less Meminductor Emulators Using VDTA and CDBA

2021 ◽  
pp. 2150283
Author(s):  
Nisha Yadav ◽  
Shireesh Kumar Rai ◽  
Rishikesh Pandey
Keyword(s):  
Adaptive Learning ◽  
Hysteresis Loops ◽  
Cmos Technology ◽  
Chaotic Oscillator ◽  
Simulation Tool ◽  
Analog Multiplier ◽  
Transconductance Amplifier ◽  
Simulation Results ◽  
Pinched Hysteresis

In this paper, new memristor-less meminductor emulators have been proposed using voltage differencing transconductance amplifier (VDTA), current differencing buffered amplifier (CDBA) and a grounded capacitor. The proposed decremental/incremental meminductor emulators have been realized in both grounded and floating types of configurations. In the proposed meminductor emulators, analog multiplier, memristor and passive resistors are not used which result in simpler configurations. The pinched hysteresis loops are maintained up to 2[Formula: see text]MHz for both decremental and incremental configurations of meminductor emulators. The behaviors of decremental and incremental meminductor emulators have been analyzed after applying input pulses. The obtained results verify the performances as decremental and incremental meminductor emulators. The simulation results have been obtained using Mentor Graphics Eldo simulation tool with 180[Formula: see text]nm CMOS technology parameters. To verify the performances of the proposed meminductor emulators, adaptive learning circuit and chaotic oscillator have been designed. The performances of the proposed meminductor emulators are compared with other meminductor emulators reported in the literature.

Diplexer Circuit Analysis and Design

2020 ◽  
pp. 109-121
Keyword(s):  
Bandpass Filter ◽  
Bandpass Filters ◽  
Circuit Model ◽  
Circuit Analysis ◽  
Dual Band ◽  
Model Coupling ◽  
Analysis And Design ◽  
Circuit Simulator ◽  
Novel Method

In this chapter, a novel method of designing a microwave diplexer circuit is presented. This technique involves merging a section of a dual-band bandpass filter (DBF) with a section of two separately designed bandpass filters (BPFs). The chapter covers the step-by-step procedures that informed the successful realization of the diplexer circuit model. The circuit model coupling arrangement, simulation, and results are also covered. The diplexer circuit developed here has been simulated using the Keysight ADS circuit simulator. The results presented show a very good isolation between the transmit and the receive bands of the diplexer circuit.

A Novel Floating/Grounded Meminductor Emulator

2020 ◽  
Vol 29 (15) ◽  
pp. 2050247 ◽  
Author(s):  
Hasan Sozen ◽  
Ugur Cam
Keyword(s):  
Hysteresis Loop ◽  
Operational Amplifier ◽  
Current Conveyors ◽  
Current Feedback ◽  
Transconductance Amplifier ◽  
Additional Control ◽  
Pinched Hysteresis Loop ◽  
Terminal Element ◽  
Current Feedback Operational Amplifier ◽  
Pinched Hysteresis

Meminductor is a nonlinear two-terminal element with storage energy and memory ability. To date, meminductor element is not available commercially as memristor and memcapacitor are. Therefore, it is of great significance to implement a meminductor emulator for breadboard experiment. In this paper, a flux-controlled floating/grounded meminductor emulator without a memristor is presented. It is built with commercially available off-the-shelf electronic devices. It consists of single operational transconductance amplifier (OTA), single multiplier, two second-generation current conveyors (CCIIs), single current-feedback operational amplifier (CFOA) and single operational amplifier. Using OTA device introduces an additional control parameter besides frequency and amplitude values of applied voltage to control the area of pinched hysteresis loop of meminductor. Mathematical model of proposed emulator circuit is given to describe the behavior of meminductor circuit. The breadboard experiment is performed using CA3080, AD844, AD633J and LM741 for OTA, CCII–CFOA, multiplier and operational amplifier, respectively. Simulation and experimental test results are given to verify the theoretical analyses. Frequency-dependent pinched hysteresis loop is maintained up to 5 kHz. The presented meminductor emulator tends to work as ordinary inductor for higher frequencies.

Circuit Model of Nonlinear Inductor with Magnetic Core Based on Duality Theory

2012 ◽  
Vol 614-615 ◽  
pp. 1344-1347
Author(s):  
Guang Yang
Keyword(s):  
Topological Structure ◽  
Duality Theory ◽  
Magnetic Circuit ◽  
Magnetic Core ◽  
Circuit Model ◽  
Model Based ◽  
Simulation Results

A circuit model of nonlinear inductor with magnetic core based on duality theory is presented in this paper. The presented circuit model of the nonlinear inductor can reflect the magnetic circuit topological structure of the magnetic core very well. The circuit model of the nonlinear inductor based on duality theory was implemented in the PSCAD software for verification. The transient temporal simulation was made at 50 Hz and 500 Hz. The validation of the circuit model based on duality theory has been verified by comparing the simulation results obtained by PSCAD software and ANSOFT software.

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