CMOS Realization of All-Positive Pinched Hysteresis Loops
Keyword(s):
A Charge
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Two novel nonlinear circuits that exhibit an all-positive pinched hysteresis loop are proposed. These circuits employ two NMOS transistors, one of which operates in its triode region, in addition to two first-order filter sections. We show the equivalency to a charge-controlled resistance (memristance) in a decremental state via detailed analysis. Simulation and experimental results verify the proposed theory.
2013 ◽
Vol 278-280
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pp. 1081-1090
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2016 ◽
Vol 26
(02)
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pp. 1750029
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2019 ◽
Vol 28
(10)
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pp. 1950166
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2020 ◽
Vol 29
(15)
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pp. 2050247
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2012 ◽
Vol 59
(9)
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pp. 607-611
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2016 ◽
Vol 15
(3)
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pp. 993-1002
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