The fourth fundamental circuit element: principle and applications

The relationships between four basic circuit variables - voltage (v), current (i), charge (q), and magnetic flux (ϕ) - have defined three fundamental circuit elements: resistor, capacitor, and inductor. From a symmetry view, there is a fourth fundamental circuit element defined from the relationship between charge and magnetic flux. Historically, a device called memristor was considered to be the fourth element, but it has caused intense controversy because the memristor is conceived based on a nonlinear i-v relationship rather than a direct q-ϕ relationship. Alternatively, a direct correlation between trapped charge (q) and magnetic flux (ϕ) can be built up by employing the magnetoelectric (ME) effects, i.e., magnetic field control of electric polarization and electric field control of magnetization. In this review, we summarize recent progress on the principle and applications of the fourth circuit element based on the ME effects. Both the fourth linear element and nonlinear memelement, termed transtor and memtranstor, respectively, have been proposed and experimentally demonstrated. A complete relational diagram of fundamental circuit elements has been constructed. The transtor with a linear ME effect can be used in a variety of applications such as the energy harvester, tunable inductor, magnetic sensor, gyrator, and transformer etc. The memtranstor showing a pinched hysteresis loop has a great potential in developing low-power nonvolatile electronic devices. The principle is to utilize the states of the ME coefficient αE=dE/dH, instead of resistance, magnetization or electric polarization to store information. Both nonvolatile memories and logic functions can be implemented using the memtranstors, which provides a candidate route toward the logic-in-memory computing system. In addition, artificial synaptic devices that are able to mimic synaptic behaviors have also been realized using the memtranstor. The fourth circuit element and memelement based on the ME effects provide extra degrees of freedom to broaden circuit functionalities and develop advanced electronic devices.

An Efficient and Flexible Window Function for Memristor Model and its Analog Circuit Application

The memristor is a nanostructure resistive tuning two terminal novel electronics device that has been widely explored in the area of neuromorphic computing systems, memories, digital circuits, analog circuits and many more new applications. In this article an efficient and flexible window function is presented for linear drift memristor model. Propose window function provides a unique feature (controllable window function discontinuity) to linear drift memristor model by which DPHL (Distorted Pinched Hysteresis Loop) problem is resolved and also improved the programming resistance state of the memristor. Five control parameters are introduced in the presented window function, in order to fix the pre-existing problem (like boundary effect, boundary lock and inflexibility) and make it more flexible. The programmable analog gain amplifier circuit is ultimately executed to instantiate the utilization of evolved memristor model.

A simple time-delay memristor and its application in 2D HR neuron model

Since the concept of memristor was proposed, the memristor, as the fourth-generation electronic component, has attracted great attention from researchers. Memristors can be used not only for nonvolatile memory but also to mimic the behavior of nervous system. The inherent nonlinearity of memristor makes it valuable in nonlinear circuits. Since it is still difficult to realize the commercial application of memristors at present, designing suitable memristor models can play a guiding role in practical application. This work proposes a novel memristor model with a time-delay state variable. The proposed memristor cannot only generate pinched hysteresis loop under periodic signal excitation, but also can generate chaotic current or even hyperchaotic current under DC voltage. The nonlinear dynamics of the proposed time-delay memristor are studied by phase portraits, bifurcation diagram and Lyapunov exponents. Furthermore, the proposed memristor is used in the HR neuron model to study neuronal electrical activities with electromagnetic induction. Multiple firing patterns of the memristive neuron can be generated such as periodic, bursting and chaotic. Finally, the memristor emulator circuit and the HR neuron model circuit are designed and simulated by Pspice.

Novel Meminductor Emulators Using Operational Amplifiers and their Applications in Chaotic Oscillators

This paper presents six different meminductor emulator circuits based on operational amplifiers. Five circuits of meminductor emulators have been proposed using two operational amplifiers, one memristor, three resistors and one capacitor, whereas the sixth circuit uses two operational amplifiers, two memristors, one resistor and two capacitors. All circuits of the proposed meminductor emulators are very simple over most of the realizations of meminductor emulators in the literature. The behaviors of meminductor emulators are satisfactory over a wide range of frequencies. The proposed configurations of meminductor emulators have been simulated by the LTspice tool. The SPICE models of both operational amplifier (AD711) and memristor have been used for simulation. The workability of the proposed meminductor emulators has also been verified using the basic and well-known structure of operational amplifier. In addition, the pinched hysteresis loop obtained by the simulation results of meminductor emulator has been achieved by the experimental results as well. Chaotic oscillator has been designed using the proposed meminductor emulator to prove the worthiness of the design.

A Novel Bipolar Photon-Controlled Generalized Memristor Based on Avalanche Photodiode

A novel bipolar photon-controlled generalized memristor model with an avalanche photodiode (APD) passive quenching circuit is presented in this paper. The SPICE model of the circuit is established and its fingerprints are analyzed by the pinched hysteresis loops with different bipolar periodic stimuli. The dynamical characteristics of the proposed circuit model are investigated both theoretically and simulatively. The results verified by Cadence Spectre circuit simulator demonstrate that the proposed circuit model is a simple bipolar photon-controlled generalized memristor. Compared with the previously published memristor models, the biggest innovation of this paper is to propose a bipolar generalized memristor model instead of the traditional model, which can easily form the pinched hysteresis loop. Another highlight is that the generalized memristor model in this paper is controlled by photons while conventional memristors are charge-controlled/flux-controlled. Furthermore, the circuit level models are more stable, more reliable and more resistant to interference than the device level models. The topological structure of the proposed circuit model in this paper is much more simpler.

A Novel Floating/Grounded Meminductor Emulator

Meminductor is a nonlinear two-terminal element with storage energy and memory ability. To date, meminductor element is not available commercially as memristor and memcapacitor are. Therefore, it is of great significance to implement a meminductor emulator for breadboard experiment. In this paper, a flux-controlled floating/grounded meminductor emulator without a memristor is presented. It is built with commercially available off-the-shelf electronic devices. It consists of single operational transconductance amplifier (OTA), single multiplier, two second-generation current conveyors (CCIIs), single current-feedback operational amplifier (CFOA) and single operational amplifier. Using OTA device introduces an additional control parameter besides frequency and amplitude values of applied voltage to control the area of pinched hysteresis loop of meminductor. Mathematical model of proposed emulator circuit is given to describe the behavior of meminductor circuit. The breadboard experiment is performed using CA3080, AD844, AD633J and LM741 for OTA, CCII–CFOA, multiplier and operational amplifier, respectively. Simulation and experimental test results are given to verify the theoretical analyses. Frequency-dependent pinched hysteresis loop is maintained up to 5 kHz. The presented meminductor emulator tends to work as ordinary inductor for higher frequencies.

Memristive Behavior in Magnetic Elements Separated by Thin Non-Magnetic Spacer Layer

Memristance due to domain wall displacement following spin polarization of current through two magnetic elements with a thin non-magnetic spacer layer in between has been studied in this paper. A domain wall is a type of spin structure appearing between two magnetic domains. When spin polarized current interacts with the second layer it produces a change of resistance which depends on the relative orientation of the magnetic moments in layers. Analytical simulation results on 10 nm sample size domain wall have been obtained under the impression of magnetic field and spin polarization of current. The non-linear pinched hysteresis loop obtained as currentvoltage characteristics shows linearity at high frequencies.

Memristor Emulator Circuit Using Multiple-Output OTA and Its Experimental Results

A charge-controlled memristor emulator circuit based on one kind of active device [operational transconductance amplifier (OTA)] using CMOS technology is introduced in this paper. The proposed circuit can be configured in both incremental and decremental types by using a simple switch. The memristor behavior can be electronically tuned by adjusting the transconductance of the OTAs. By changing the value of the capacitor, the pinched hysteresis loop observed in the current versus voltage plane can be held at higher frequencies. The proposed emulator circuit functions well up to 500 kHz. The experiment has been performed using commercially available OTA ICs (CA3080). The experimental demonstration has been carried out for 10, 20 and 120[Formula: see text]kHz. A simple high-pass filter is explained in both configurations to demonstrate the functionality of the proposed memristor emulator. The proposed circuit has been simulated in PSPICE using 0.5-[Formula: see text]m CMOS parameter. The simulated and experimental results validate the theoretical proposition.

A Novel Generalized Memristor Based on Three-Phase Diode Bridge Rectifier

Memristive characteristics in three-phase diode bridge rectifier circuit are proposed in this paper. The conduction of the diodes is discussed and the characteristics of the pinched hysteresis loop are analyzed by both numerical simulations and circuit simulations. The hysteresis loops of each phase not only are pinched at the origin but also have the other two intersection points in the first quadrant and the third quadrant when three-phase bridge rectifier circuit is running under normal operation. Other conditions are also discussed when a variety of faults conditions occur. The simulation results verify that the three-phase bridge rectifier circuit can be described as a generalized memristor element during several operation states.

Simple Double-Scroll Chaotic Circuit Based on Meminductor

Meminductor has attracted more and more attention as the new memory element. In this paper, a new generic meminductor model is proposed and analyzed. Its emulator is designed and its pinched hysteresis loop is presented. Based on the established meminductor and using a traditional capacitor and resistor, a new simple chaotic circuit presenting double-scroll chaotic attractors is proposed and its dynamical behaviors including phase portrait, Lyapunov exponents, Poincare mapping, power spectrum, bifurcation and the sensibility of initial value are analyzed. Meanwhile, it has been found that hidden attractors and transient chaotic phenomena under different initial value. Finally, the hardware circuit for the proposed simple double-scroll chaotic system is constructed and some experimental results are presented for validating the correctness of the theoretical analysis.