STRESS FACTOR AND FAILURE ANALYSIS OF CONSTANT FRACTION DISCRIMINATOR USING DESIGN OF EXPERIMENTS

2013 ◽  
Vol 20 (03) ◽  
pp. 1340003 ◽  
Author(s):  
ADITHYA THADURI ◽  
A. K. VERMA ◽  
V. GOPIKA ◽  
RAJESH GOPINATH ◽  
UDAY KUMAR
Keyword(s):  
Design Of Experiments ◽  
Failure Analysis ◽  
Failure Modes ◽  
Time To Failure ◽  
Distribution Models ◽  
Physics Of Failure ◽  
Failure Characteristics ◽  
Constant Fraction Discriminator ◽  
The Impact ◽  
Stress Parameters

Reliability prediction using traditional approaches were implemented at earlier stages of electronics. But due to advancements in science and technology, the above models are outdated. The alternative approach, physics of failure provides exhaustive information on basic failure phenomenon with failure mechanisms, failure modes and failure analysis becomes prominent because this method depends on factors like materials, processes, technology, etc., of the component. Constant fraction discriminators which is important component in NFMS needs to study failure characteristics and this paper provides this information on failure characteristics using physics of failure approach. Apart from that, the combined physics of failure approach with the statistical methods such as design of experiments, accelerated testing and failure distribution models to quantify time to failure of this electronic component by radiation and temperature as stress parameters. The SEM analysis of the component is carried out by decapsulating the samples and studied the impact of stress parameters on the device layout.

Contextual Failure Analysis Improves Reliability While Pushing the Envelope of Extended Reach Wells in a Giant Brown Field, UAE

2021 ◽  
Author(s):  
Elena Cantarelli ◽  
Khoa Le Pham Dang ◽  
Hernan Melgares Escalera
Keyword(s):  
Quality Improvement ◽  
Service Quality ◽  
Failure Analysis ◽  
Failure Modes ◽  
Action Plan ◽  
Comparative Approach ◽  
Risk Matrix ◽  
Priority List ◽  
Root Cause ◽  
The Impact

Abstract The current combination of increasingly complex wellbores and tightening budgets forces operators to do more with less and find new ways to expand the drilling envelop. Often this pushes the parameters to the limit in order to achieve faster penetration rates. Operating at the limit or beyond impacts equipment reliability and project cost. A thorough failure analysis of the root cause(s) of every incident can help identify and address areas that need improvement. Identifying a cause fosters improvement while it simultaneously pushes the boundaries so the profitability of mature assets can be maximized. Typical failure analysis attempts to determine the cause of a failure and establish corrective actions to prevent reoccurrence. In a large extended reach drilling project targeting a mature field, the approach to a single failure was expanded and projected in a proactive manner to anticipate the impact of current failure modes in future more challenging scenarios. This innovative method combines the classic failure analysis approach with a comparative approach designed to identify and classify each factor that contributed to the failure. This information is then compiled into a dynamic predictive risk matrix to improve the planning. This method, thanks to the contextualization of individual failures and the multi-facet comparative analysis, revealed a pattern between reliability trends and environmental challenges. The pattern was correlated with the increased drilling difficulty over the lifetime of the project, and suggested that the long-established practices had to be revised to overcome the new scenario. The analysis contributed to the delineation of a strong action plan that immediately revealed a consistent service quality improvement quarter on quarter and nearly a 50% decrease in failure rate. The enhanced reliability had a direct impact on the performance that registered a significant reduction of the drilling time, thus lowering the overall well construction cost. In today's economics where cost reduction, resource optimization and sustainability are at the top of the operator's priority list, failure analysis has become paramount to ensure continuous improvement. Effective analytic methods to identify and eliminate showstoppers are needed to minimize unplanned events and deliver within budget. By digging deep into the root cause of incidents, this new approach to failure analysis enabled an enhanced, broader and more effective quality improvement plan that tackled service quality from multiple angles. From refining bottomhole assembly (BHA) design and risk matrix to drafting field guidelines and roadmaps, this approach also provided extra guidance and risk awareness for future well planning improvement. This particularly applies to mature fields where wellbore complexity increases at the same time budgets decrease and it's necessary to improve operational excellence to assure profitability.

A Systematic Approach to Hardware Qualification

1996 ◽  
Vol 39 (4) ◽  
pp. 33-39
Author(s):  
Phillip Barela ◽  
Steven Cornford
Keyword(s):  
Systematic Approach ◽  
Failure Modes ◽  
New Technology ◽  
Matrix Multiplication ◽  
Project Managers ◽  
Physics Of Failure ◽  
Other Information ◽  
Catch 22 ◽  
The Cost ◽  
The Impact

A systematic approach for the development of a hardware qualification approach is described. This approach stems from the need to address the "Catch-22" of not flying new technology because it has not flown. A physics of failure approach is used to identify failure modes, and the impact and likelihood of these failures on the mission requirements is plotted in a Requirements Matrix. These same failure modes are plotted against the effectiveness of the available preventions, analyses, control, and tests (PACTs) at screening for, or eliminating, these failure modes in a test effectiveness matrix. Matrix multiplication results in a ranked set of PACTs that can be sorted according to cost and redundancy with other PACTs. This and other information resulting from the process allows project managers to make more informed decisions regarding the cost and risk tradeoffs inherent in any qualification program.

FAILURE MODELING OF CONSTANT FRACTION DISCRIMINATOR USING PHYSICS OF FAILURE APPROACH

2013 ◽  
Vol 20 (03) ◽  
pp. 1340002 ◽  
Author(s):  
ADITHYA THADURI ◽  
A. K. VERMA ◽  
V. GOPIKA ◽  
RAJESH GOPINATH ◽  
UDAY KUMAR
Keyword(s):  
Failure Mechanisms ◽  
Reliability Prediction ◽  
Time To Failure ◽  
Point Location ◽  
Physics Of Failure ◽  
Failure Modeling ◽  
Constant Fraction Discriminator ◽  
Custom Made ◽  
Failure Point ◽  
Critical Components

Due to several advancements in the technology trends in electronics, the reliability prediction by the constant failure methods and standards no longer provide accurate time to failure. The physics of failure methodology provides a detailed insight on the operation, failure point location and causes of failure for old, existing and newly developed components with consideration of failure mechanisms. Since safety is a major criteria for the nuclear industries, the failure modeling of advanced custom made critical components that exists on signal conditioning module are need to be studied with higher confidence. One of the components, constant fraction discriminator, is the critical part at which the failure phenomenon and modeling by regression is studied in this paper using physics of failure methodology.

Failure Analysis Case Study of a 1.5 Meter Space Flex Harness

2017 ◽  
Author(s):  
Erick Kim ◽  
Kamjou Mansour ◽  
Gil Garteiz ◽  
Javeck Verdugo ◽  
Ryan Ross ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Failure Modes ◽  
Field Of View ◽  
Area Of Interest ◽  
Air Stream ◽  
Novel Method ◽  
Temperature Controlled ◽  
Non Destructive ◽  
Failure Site

Abstract This paper presents the failure analysis on a 1.5m flex harness for a space flight instrument that exhibited two failure modes: global isolation resistances between all adjacent traces measured tens of milliohm and lower resistance on the order of 1 kiloohm was observed on several pins. It shows a novel method using a temperature controlled air stream while monitoring isolation resistance to identify a general area of interest of a low isolation resistance failure. The paper explains how isolation resistance measurements were taken and details the steps taken in both destructive and non-destructive analyses. In theory, infrared hotspot could have been completed along the length of the flex harness to locate the failure site. However, with a field of view of approximately 5 x 5 cm, this technique would have been time prohibitive.

Case Studies of Brittle Interfacial Failures in Area Array Solder Interconnects

2000 ◽  
Author(s):  
George M. Wenger ◽  
Richard J. Coyle ◽  
Patrick P. Solan ◽  
John K. Dorey ◽  
Courtney V. Dodd ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Failure Modes ◽  
Electroless Nickel ◽  
Electrical Performance ◽  
Printed Wiring Board ◽  
Solder Interconnects ◽  
Area Array ◽  
Surface Finishes ◽  
Soldering Reaction

Abstract A common pad finish on area array (BGA or CSP) packages and printed wiring board (PWB) substrates is Ni/Au, using either electrolytic or electroless deposition processes. Although both Ni/Au processes provide flat, solderable surface finishes, there are an increasing number of applications of the electroless nickel/immersion gold (ENi/IAu) surface finish in response to requirements for increased density and electrical performance. This increasing usage continues despite mounting evidence that Ni/Au causes or contributes to catastrophic, brittle, interfacial solder joint fractures. These brittle, interfacial fractures occur early in service or can be generated under a variety of laboratory testing conditions including thermal cycling (premature failures), isothermal aging (high temperature storage), and mechanical testing. There are major initiatives by electronics industry consortia as well as research by individual companies to eliminate these fracture phenomena. Despite these efforts, interfacial fractures associated with Ni/Au surface finishes continue to be reported and specific failure mechanisms and root cause of these failures remains under investigation. Failure analysis techniques and methodologies are crucial to advancing the understanding of these phenomena. In this study, the scope of the fracture problem is illustrated using three failure analysis case studies of brittle interfacial fractures in area array solder interconnects. Two distinct failure modes are associated with Ni/Au surface finishes. In both modes, the fracture surfaces appear to be relatively flat with little evidence of plastic deformation. Detailed metallography, scanning electron microscopy (SEM), energy dispersive x-ray analysis (EDX), and an understanding of the metallurgy of the soldering reaction are required to avoid misinterpreting the failure modes.

VLSI Design for Functional Failure Analysis in the < 90 nm and Flip-Chip Era

2003 ◽  
Author(s):  
Yoav Weizman ◽  
Ezra Baruch
Keyword(s):  
Failure Analysis ◽  
Flip Chip ◽  
Light Emission ◽  
Vlsi Design ◽  
Optical Resolution ◽  
Critical Issue ◽  
Acquisition Time ◽  
Resolution Limit ◽  
Design Rules ◽  
The Impact

Abstract In recent years, two new techniques were introduced for flip chip debug; the Laser Voltage Probing (LVP) technique and Time Resolved Light Emission Microscopy (TRLEM). Both techniques utilize the silicon’s relative transparency to wavelengths longer than the band gap. This inherent wavelength limitation, together with the shrinking dimensions of modern CMOS devices, limit the capabilities of these tools. It is known that the optical resolution limits of the LVP and TRLEM techniques are bounded by the diffraction limit which is ~1um for both tools using standard optics. This limitation was reduced with the addition of immersion lens optics. Nevertheless, even with this improvement, shrinking transistor geometry is leading to increased acquisition time, and the overlapping effect between adjacent nodes remains a critical issue. The resolution limit is an order of magnitude above the device feature densities in the &lt; 90nm era. The scaling down of transistor geometry is leading to the inevitable consequence where more than 50% of the transistors in 90nm process have widths smaller than 0.4um. The acquisition time of such nodes becomes unreasonably long. In order to examine nodes in a dense logic cuicuit, cross talk and convolution effects between neighboring signals also need to be considered. In this paper we will demonstrate the impact that these effects may have on modern design. In order to maintain the debug capability, with the currently available analytical tools for future technologies, conceptual modification of the FA process is required. This process should start on the IC design board where the VLSI designer should be familiar with FA constraints, and thus apply features that will enable enhanced FA capabilities to the circuit in hand during the electrical design or during the physical design stages. The necessity for reliable failure analysis in real-time should dictate that the designer of advanced VLSI blocks incorporates failure analysis constraints among other design rules. The purpose of this research is to supply the scientific basis for the optimal incorporation of design rules for optical probing in the &lt; 90nm gate era. Circuit designers are usually familiar with the nodes in the design which are critical for debug, and the type of measurement (logic or DC level) they require. The designer should enable the measurement of these signals by applying certain circuit and physical constraints. The implementation of these constraints may be done at the cell level, the block level or during the integration. We will discuss the solutions, which should be considered in order to mitigate tool limitations, and also to enable their use for next generation processes.

Failure Modes, Reliability Analysis and Case Studies on the Integration of Copper and Low-K Technology

2004 ◽  
Author(s):  
Huixian Wu ◽  
James Cargo ◽  
Huixian Wu ◽  
Marvin White
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Cross Section ◽  
Focused Ion Beam ◽  
Failure Modes ◽  
Ion Beam ◽  
Copper Interconnects ◽  
Wet Chemical ◽  
Low K ◽  
Section Analysis

Abstract The integration of copper interconnects and low-K dielectrics will present novel failure modes and reliability issues to failure analysts. This paper discusses failure modes related to Cu/low-K technology. Here, physical failure analysis (FA) techniques including deprocessing and cross-section analysis have been developed. The deprocessing techniques include wet chemical etching, reactive ion etching, chemical mechanical polishing and a combination of these techniques. Case studies on different failure modes related to Cu/low k technology are discussed: copper voiding, copper extrusion; electromigration stress failure; dielectric cracks; delamination-interface adhesion; and FA on circuit-under-pad. For the cross-section analysis of copper/low-K samples, focused ion beam techniques have been developed. Scanning electron microscopy, EDX, and TEM analytical analysis have been used for failure analysis for Cu/low-K technology. Various failure modes and reliability issues have also been addressed.

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