COMPARISON OF 1/f NOISE IN JFETs AND MOSFETs WITH SEVERAL FIGURES OF MERIT

2011 ◽  
Vol 10 (04) ◽  
pp. 447-465 ◽  
Author(s):  
FELIX A. LEVINZON ◽  
L. K. J. VANDAMME
Keyword(s):  
Thermal Noise ◽  
Empirical Relation ◽  
Low Noise ◽  
Corner Frequency ◽  
Current Gain ◽  
Noise Parameter ◽  
Input Noise ◽  
High Area ◽  
Measurement Results ◽  
Equivalent Input Noise

Measurement results are presented from 0.1 Hz to 100 kHz of 1/f and thermal noise in different n-JFETs, and n- and p-MOSFETs. The comparison of the 1/f noise is based on Hooge's empirical relation with the 1/f noise parameter α as figure of merit, without suggesting a physical origin. We find that the empirical relation for 1/f noise in MOSFETs and JFETs can be used as a tool to pinpoint the dominant noise source (either ΔN number fluctuations or Δμ mobility fluctuations) and its location, either in the channel or in the parasitic series resistance. Similar relations hold in JFETs and MOSFETs for the 1/f noise corner frequency fc, where thermal and 1/f noise are equal and the ratio fc/fT with fT the unity current gain frequency. The geometry independent parameter α and ratio fc/fT are compared from MOSFETs and JFETs with different channel width (W) and length (L). The results show that very low-noise n-JFETs have a corner frequency fc ≈ 40 Hz, and very low 1/f and thermal noise in agreement with the high W/L ratio and high area WL of the device. Specifically, the equivalent input noise voltage of the investigated JFET IF9030 was about 3.7 nV/√ Hz at 1 Hz, 1.3 nV/√Hz at 10 Hz, and about 0.6 nV/√ Hz (3.6 ×10-19 V2/Hz or Req th noise = 23 Ω) for f ≥ 100 Hz. The 1/f noise parameter α for that JFET is as low as α = 2 × 10-8. This α-value is among the lowest values ever observed. MOSFETs often have α, fc and fc/fT values that are a few decades higher than for JFETs.

A low-noise transistorized seismic amplifier

1964 ◽  
Vol 54 (1) ◽  
pp. 347-368
Author(s):  
Stamatios N. Thanos
Keyword(s):  
High Reliability ◽  
Low Noise ◽  
Ocean Bottom ◽  
Low Frequencies ◽  
Input Noise ◽  
Remote Operation ◽  
Source Impedance ◽  
Ocean Bottom Seismographs ◽  
Equivalent Input Noise ◽  
Remote Calibration

abstract The use of transistors for the amplification of fractional microvolt signals at extremely low frequencies is illustrated in the design of an amplifier developed for use in a lunar seismograph. The amplifier has an equivalent input noise voltage of 0.2 microvolts, p-p, with a source impedance of 2000 ohms and a 3 db bandwidth of 0.035 cps to 22 cps. The nominal input impedance is 1700 ohms. It is completely transistorized and performs satisfactorily over a specified temperature range of −20°C to +100°C. Low power requirements, high reliability, and capability for remote calibration and gain change make this amplifier especially suitable for any field or remote operation under extreme environmental conditions. This amplifier is presently being used in ocean bottom seismographs and magnetic variometers.

Signal Detection Technology for Giant Magnetoresistance Sensors

2013 ◽  
Vol 303-306 ◽  
pp. 270-273 ◽  
Author(s):  
Jing Hua Hu ◽  
Meng Chun Pan ◽  
Wu Gang Tian ◽  
Jia Fei Hu
Keyword(s):  
Signal Processing ◽  
Signal Detection ◽  
Giant Magnetoresistance ◽  
Low Noise ◽  
Output Data ◽  
Input Noise ◽  
Algorithm Efficiency ◽  
Detection Technology ◽  
Equivalent Input Noise ◽  
Signal Processing Methods

Presently, many attentions have been paid on low-noise pre-amplifier circuits and steady signal processing methods, but seldom on the combination of two technologies. In this paper, a small size low noise pre-amplifier circuit with 110dB Common Mode Rejection Ratio（CMRR）has been developed for giant magnetoresistance sensors(GMR) and its equivalent input noise voltage density is about . In addition, we proposed a new signal processing method for the sensors. In the method, we defined the quotient between the complex multiplex computation times and the output data num as a new figure of merit to evaluate that algorithm efficiency in signal detection, and name that quotient the computation times -to- output data num ratio (CTOR). Simulation results showed that the new method realized better parameters evaluation precision and higher efficiency than Modified Rife method, could be implemented easily in embedded systems.

A high-resolution tunneling magneto-resistance sensor interface circuit

2017 ◽  
Vol 31 (04) ◽  
pp. 1750030 ◽  
Author(s):  
Xiangyu Li ◽  
Liang Yin ◽  
Weiping Chen ◽  
Zhiqiang Gao ◽  
Xiaowei Liu
Keyword(s):  
Band Gap ◽  
Temperature Coefficient ◽  
Low Frequency ◽  
Low Noise ◽  
Instrumentation Amplifier ◽  
Interface Circuit ◽  
Input Noise ◽  
Rejection Ratio ◽  
Equivalent Input Noise ◽  
Magneto Resistance

In this paper, a chopper instrumentation amplifier and a high-precision and low-noise CMOS band gap reference in a standard 0.5 [Formula: see text] CMOS technology for a tunneling magneto-resistance (TMR) sensor is presented. The noise characteristic of TMR sensor is an important factor in determining the performance of the sensor. In order to obtain a larger signal to noise ratio (SNR), the analog front-end chip ASIC weak signal readout circuit of the sensor includes the chopper instrumentation amplifier; the high-precision and low-noise CMOS band gap reference. In order to achieve the low noise, the chopping technique is applied in the first stage amplifier. The low-frequency flicker noise is modulated to high-frequency by chopping switch, so that the modulator has a better noise suppression performance at the low frequency. The test results of interface circuit are shown as below: At a single 5 V supply, the power dissipation is 40 mW; the equivalent offset voltage is less than 10 uV; the equivalent input noise spectral density 30 nV/Hz[Formula: see text](@10 Hz), the equivalent input noise density of magnetic is 0.03 nTHz[Formula: see text](@10 Hz); the scale factor temperature coefficient is less than 10 ppm/[Formula: see text]C, the equivalent input offset temperature coefficient is less than 70 nV/[Formula: see text]C; the gain error is less than 0.05%, the common mode rejection ratio is greater than 120 dB, the power supply rejection ratio is greater than 115 dB; the nonlinear is 0.1% FS.

scholarly journals Low Noise Interface ASIC of Micro Gyroscope with Ball-disc Rotor

Sensors ◽  
2020 ◽  
Vol 20 (4) ◽  
pp. 1238 ◽  
Author(s):  
Mingyuan Ren ◽  
Honghai Xu ◽  
Xiaowei Han ◽  
Changchun Dong ◽  
Xuebin Lu
Keyword(s):  
Noise Analysis ◽  
Cmos Technology ◽  
Low Noise ◽  
Circuit Analysis ◽  
Interface Circuit ◽  
Input Noise ◽  
Measurement Results ◽  
Noise Density

A low noise interface ASIC for micro gyroscope with ball-disc rotor is realized in 0.5µm CMOS technology. The interface circuit utilizes a transimpedance pre-amplifier which reduces input noise. The proposed interface achieves 0.003°/s/Hz1/2 noise density and 0.003°/s sensitivity with ±100°/s measure range. The functionality of the full circuit, including circuit analysis, noise analysis and measurement results, has been demonstrated.

Design of Broadband LNA Using Improved Self-Bias Architecture

2019 ◽  
Vol 28 (08) ◽  
pp. 1920005 ◽  
Author(s):  
Tian Qi ◽  
Songbai He
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Power Gain ◽  
Matching Networks ◽  
Self Bias ◽  
Measurement Results ◽  
Chip Size ◽  
Simulation Results ◽  
Noise Amplifier ◽  
Ku Band

A broadband low-noise amplifier (LNA) using 0.13 [Formula: see text]m GaAs HEMT technology for Ku-band applications is presented in this paper. By introducing an improved self-bias architecture, the LNA is achieved with low noise figure (NF) and high power gain. Compared with traditional LNA, self-bias architecture can reduce DC supplies to single one, and the improved architecture proposed here also takes part in source matching to reduce the complexity matching networks for broadband applications. To verify, an LNA operating over 12–18-GHz bandwidth is fabricated. The measurement results, for all the 72 chips on the wafer, and their average values are in great accordance with the simulation results, with 25.5–27.5-dB power gain, 1.1–1.8-dB NF, 15–17.5-dBm output power at [Formula: see text] and with a chip size of 2 mm [Formula: see text] 1.5 mm.

Base Transport Limited Current Gain Analysis for Low-Noise SiGe DHBTs

2004 ◽  
Vol 4 (4) ◽  
pp. 521-525
Author(s):  
Khanduri Gagan . ◽  
Panwar Brishbhan .
Keyword(s):  
Low Noise ◽  
Current Gain ◽  
Limited Current

A Linearity Improved 10-bit 120-MS/s 1.5 mW SAR ADC with High-Speed and Low-Noise Dynamic Comparator Technique

2019 ◽  
Vol 29 (06) ◽  
pp. 2050084
Author(s):  
Daiguo Xu ◽  
Hequan Jiang ◽  
Dongbin Fu ◽  
Xiaoquan Yu ◽  
Shiliu Xu ◽  
...  
Keyword(s):  
High Speed ◽  
Cmos Technology ◽  
Low Noise ◽  
Sar Adc ◽  
Dynamic Comparator ◽  
Analog To Digital ◽  
Input Noise ◽  
Clock Feedthrough ◽  
Threshold Voltages ◽  
Coupled Technique

This paper presents a linearity improved 10-bit 120-MS/s successive approximation register (SAR) analog-to-digital converter (ADC) with high-speed and low-noise dynamic comparator. A gate cross-coupled technique is introduced in boost sampling switch, the clock feedthrough effect is compensated without extra auxiliary switch and the linearity of sampling switch is enhanced. Further, substrate voltage boost technique is proposed, the absolute values of threshold voltage and equivalent impedances of MOSFETs are both depressed. Consequently, the delay of comparator is also reduced. Moreover, the reduction of threshold voltages for input MOSFETs could bring higher transconductance and lower equivalent input noise. To demonstrate the proposed techniques, a design of SAR ADC is fabricated in 65-nm CMOS technology, consuming 1.5[Formula: see text]mW from 1[Formula: see text]V power supply with a SNDR [Formula: see text][Formula: see text]dB and SFDR [Formula: see text][Formula: see text]dB. The proposed ADC core occupies an active area of 0.021[Formula: see text]mm2, and the corresponding FoM is 24.4 fJ/conversion-step with Nyquist frequency.

Evaluation of Noise Characteristics of Drainage and Water Supply Systems in Apartment Bathrooms

2014 ◽  
Vol 1025-1026 ◽  
pp. 987-990
Author(s):  
Jun Oh Yeon ◽  
Kyoung Woo Kim ◽  
Kwan Seop Yang ◽  
Byung Kwon Lee
Keyword(s):  
Water Supply ◽  
Noise Level ◽  
Drainage System ◽  
Low Noise ◽  
Sound Level ◽  
Water Supply Systems ◽  
Apartment Building ◽  
Noise Characteristics ◽  
Measurement Results ◽  
Supply Systems

We have developed a low-noise drainage system, which was installed in bathrooms of apartment building units as well as in a mock-up test building, to evaluate the noise level in order to reduce the noise produced in the bathrooms of multiunit dwellings. The drainage system installed in the mock-up building consists of six types of detachable drains, and the level of noise produced during toilet use in the upper unit was measured in the lower unit. The measurement results showed that low-noise drainage 4 exhibited the Leq(equivalent continuous sound level) at 34.7 dB(A). The noise measurement results of various types of low-noise drains installed in an apartment building showed that the Leqduring toilet use was 46.7 dB(A) on average, and the Leqduring sink use was 40.5 dB(A) on average.

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