New Method for Soft-Error Mapping in Dynamic Random Access Memory Using Nuclear Microprobe

1992 ◽  
Vol 31 (Part 1, No. 12B) ◽  
pp. 4541-4544 ◽  
Author(s):  
Hirokazu Sayama ◽  
Shigenori Hara ◽  
Hiroshi Kimura ◽  
Yoshikazu Ohno ◽  
Shinichi Satoh ◽  
...  
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Soft Error ◽  
Dynamic Random Access Memory ◽  
New Method ◽  
Nuclear Microprobe ◽  
Access Memory

Sub-6F2 Charge Trap Dynamic Random Access Memory Using a Novel Operation Scheme

2006 ◽  
Author(s):  
Zongliang Huo ◽  
Seungjae Baik ◽  
Shieun Kim ◽  
In-seok Yeo ◽  
U-in Chung ◽  
...  
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Dynamic Random Access Memory ◽  
Access Memory ◽  
Charge Trap

AS8‐static random access memory (SRAM): asymmetric SRAM architecture for soft error hardening enhancement

2017 ◽  
Vol 11 (1) ◽  
pp. 89-94 ◽  
Author(s):  
Ihsen Alouani ◽  
Wael M. Elsharkasy ◽  
Ahmed M. Eltawil ◽  
Fadi J. Kurdahi ◽  
Smail Niar
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Soft Error ◽  
Static Random Access Memory ◽  
Access Memory

Analysis of Grain Boundary Dependent Memory Characteristics in Poly-Si One-Transistor Dynamic Random-Access Memory

2021 ◽  
Vol 21 (8) ◽  
pp. 4216-4222
Author(s):  
Songyi Yoo ◽  
In-Man Kang ◽  
Sung-Jae Cho ◽  
Wookyung Sun ◽  
Hyungsoon Shin
Keyword(s):  
Strong Electric Field ◽  
Memory Performance ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Dynamic Random Access Memory ◽  
Thin Body ◽  
Memory Cells ◽  
Access Memory ◽  
Memory Characteristics

A capacitorless one-transistor dynamic random-access memory cell with a polysilicon body (poly-Si 1T-DRAM) has a cost-effective fabrication process and allows a three-dimensional stacked architecture that increases the integration density of memory cells. Also, since this device uses grain boundaries (GBs) as a storage region, it can be operated as a memory cell even in a thin body device. GBs are important to the memory characteristics of poly-Si 1T-DRAM because the amount of trapped charge in the GBs determines the memory’s data state. In this paper, we report on a statistical analysis of the memory characteristics of poly-Si 1T-DRAM cells according to the number and location of GBs using TCAD simulation. As the number of GBs increases, the sensing margin and retention time of memory cells deteriorate due to increasing trapped electron charge. Also, “0” state current increases and memory performance degrades in cells where all GBs are adjacent to the source or drain junction side in a strong electric field. These results mean that in poly-Si 1T-DRAM design, the number and location of GBs in a channel should be considered for optimal memory performance.

Pt/BaxSr(1-x)TiO3/Pt Capacitor Technology for 0.15 µm Embedded Dynamic Random Access Memory

2004 ◽  
Vol 43 (5A) ◽  
pp. 2457-2461 ◽  
Author(s):  
Yoshikazu Tsunemine ◽  
Tomonori Okudaira ◽  
Keiichiro Kashihara ◽  
Akie Yutani ◽  
Hiroki Shinkawata ◽  
...  
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Dynamic Random Access Memory ◽  
Access Memory
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